From df0b86f43228c4472acbc8c4493cd3babdcc7574 Mon Sep 17 00:00:00 2001 From: Martin Braun Date: Tue, 19 Dec 2023 10:20:39 +0100 Subject: [PATCH] fpga: x300: sfpp: Fix warning about duplicate reg This removes a duplicate code section that causes build warnings. It also references a wire that gets declared further down and the removed and remaining code sections were incorrectly indented. Original-commit: e8084eb4cb4ec6ff6476feb6e77ab3ea45dd969e --- top/x300/x300_sfpp_io_core.v | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/top/x300/x300_sfpp_io_core.v b/top/x300/x300_sfpp_io_core.v index a8de09f..b5a97d2 100644 --- a/top/x300/x300_sfpp_io_core.v +++ b/top/x300/x300_sfpp_io_core.v @@ -395,16 +395,6 @@ generate .bist_checker_errors(bist_checker_errors) ); - reg mac_crit_err_latch; - always @(posedge bus_clk) begin - if (bus_rst | mac_clear) begin - mac_crit_err_latch <= 1'b0; - end else begin - if (mac_crit_err_bclk) - mac_crit_err_latch <= 1'b1; - end - end - assign m_axis_tuser = 4'd0; wire set_stb; @@ -449,15 +439,15 @@ generate bist_lock_latency <= bist_lock_latency + 20'd1; end - reg mac_crit_err_latch; - always @(posedge bus_clk) begin - if (bus_rst | mac_clear) begin - mac_crit_err_latch <= 1'b0; - end else begin - if (mac_crit_err_bclk) - mac_crit_err_latch <= 1'b1; - end - end + reg mac_crit_err_latch; + always @(posedge bus_clk) begin + if (bus_rst | mac_clear) begin + mac_crit_err_latch <= 1'b0; + end else begin + if (mac_crit_err_bclk) + mac_crit_err_latch <= 1'b1; + end + end wire [31:0] core_status = { 6'h0, //[31:26]