diff --git a/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap/common_regs.v b/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap/common_regs.v
index 9a66d9a..47a9348 100644
--- a/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap/common_regs.v
+++ b/top/x400/ip/x4xx_ps_rfdc_bd/common/regmap/common_regs.v
@@ -144,6 +144,12 @@
// db0_adc_seq_done is asserted.
//
//
+//
+//
+// Write a '1' to this bit to trigger a reset for the ADC gearboxes.
+// There is no done signal for this reset.
+//
+//
//
//
// Write a '1' to this bit to trigger a reset for the
@@ -158,6 +164,12 @@
// db0_dac_seq_done is asserted.
//
//
+//
+//
+// Write a '1' to this bit to trigger a reset for the DAC gearboxes.
+// There is no done signal for this reset.
+//
+//
//
//
//
diff --git a/top/x400/regmap/x410/PkgRFDC_REGS_REGMAP.vhd b/top/x400/regmap/x410/PkgRFDC_REGS_REGMAP.vhd
index ea9307a..13b6603 100644
--- a/top/x400/regmap/x410/PkgRFDC_REGS_REGMAP.vhd
+++ b/top/x400/regmap/x410/PkgRFDC_REGS_REGMAP.vhd
@@ -221,24 +221,30 @@ package PkgRFDC_REGS_REGMAP is
constant kUSER_ADC_TREADY_DB1Msb : integer := 31; --RF_AXI_STATUS_REGTYPE:USER_ADC_TREADY_DB1
constant kUSER_ADC_TREADY_DB1 : integer := 30; --RF_AXI_STATUS_REGTYPE:USER_ADC_TREADY_DB1
- -- RF_RESET_CONTROL_REGTYPE Type (from common_regs.v)
- constant kRF_RESET_CONTROL_REGTYPESize: integer := 32;
- constant kRF_RESET_CONTROL_REGTYPEMask : std_logic_vector(31 downto 0) := X"00000331";
- constant kFSM_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
- constant kFSM_RESETMsb : integer := 0; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
- constant kFSM_RESET : integer := 0; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
- constant kADC_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
- constant kADC_RESETMsb : integer := 4; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
- constant kADC_RESET : integer := 4; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
- constant kADC_ENABLESize : integer := 1; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
- constant kADC_ENABLEMsb : integer := 5; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
- constant kADC_ENABLE : integer := 5; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
- constant kDAC_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
- constant kDAC_RESETMsb : integer := 8; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
- constant kDAC_RESET : integer := 8; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
- constant kDAC_ENABLESize : integer := 1; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
- constant kDAC_ENABLEMsb : integer := 9; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
- constant kDAC_ENABLE : integer := 9; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
+-- RF_RESET_CONTROL_REGTYPE Type (from common_regs.v)
+constant kRF_RESET_CONTROL_REGTYPESize: integer := 32;
+constant kRF_RESET_CONTROL_REGTYPEMask : std_logic_vector(31 downto 0) := X"00000771";
+constant kFSM_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
+constant kFSM_RESETMsb : integer := 0; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
+constant kFSM_RESET : integer := 0; --RF_RESET_CONTROL_REGTYPE:FSM_RESET
+constant kADC_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
+constant kADC_RESETMsb : integer := 4; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
+constant kADC_RESET : integer := 4; --RF_RESET_CONTROL_REGTYPE:ADC_RESET
+constant kADC_ENABLESize : integer := 1; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
+constant kADC_ENABLEMsb : integer := 5; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
+constant kADC_ENABLE : integer := 5; --RF_RESET_CONTROL_REGTYPE:ADC_ENABLE
+constant kADC_GEARBOX_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:ADC_GEARBOX_RESET
+constant kADC_GEARBOX_RESETMsb : integer := 6; --RF_RESET_CONTROL_REGTYPE:ADC_GEARBOX_RESET
+constant kADC_GEARBOX_RESET : integer := 6; --RF_RESET_CONTROL_REGTYPE:ADC_GEARBOX_RESET
+constant kDAC_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
+constant kDAC_RESETMsb : integer := 8; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
+constant kDAC_RESET : integer := 8; --RF_RESET_CONTROL_REGTYPE:DAC_RESET
+constant kDAC_ENABLESize : integer := 1; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
+constant kDAC_ENABLEMsb : integer := 9; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
+constant kDAC_ENABLE : integer := 9; --RF_RESET_CONTROL_REGTYPE:DAC_ENABLE
+constant kDAC_GEARBOX_RESETSize : integer := 1; --RF_RESET_CONTROL_REGTYPE:DAC_GEARBOX_RESET
+constant kDAC_GEARBOX_RESETMsb : integer := 10; --RF_RESET_CONTROL_REGTYPE:DAC_GEARBOX_RESET
+constant kDAC_GEARBOX_RESET : integer := 10; --RF_RESET_CONTROL_REGTYPE:DAC_GEARBOX_RESET
-- RF_RESET_STATUS_REGTYPE Type (from common_regs.v)
constant kRF_RESET_STATUS_REGTYPESize: integer := 32;
diff --git a/top/x400/rf/x410/x410_rf_reset_controller.vhd b/top/x400/rf/x410/x410_rf_reset_controller.vhd
index ce1190b..9ffb570 100644
--- a/top/x400/rf/x410/x410_rf_reset_controller.vhd
+++ b/top/x400/rf/x410/x410_rf_reset_controller.vhd
@@ -57,6 +57,19 @@ end x410_rf_reset_controller;
architecture RTL of x410_rf_reset_controller is
+ component pulse_synchronizer
+ generic (
+ MODE : string := "PULSE";
+ STAGES : integer := 2);
+ port (
+ clk_a : in std_logic;
+ rst_a : in std_logic;
+ pulse_a : in std_logic;
+ busy_a : out std_logic;
+ clk_b : in std_logic;
+ pulse_b : out std_logic);
+ end component;
+
-- POR value for all resets are high.
signal cTriggerAdcReset : std_logic := '1';
signal cTriggerAdcResetDlyd : std_logic := '1';
@@ -86,13 +99,21 @@ architecture RTL of x410_rf_reset_controller is
attribute ASYNC_REG of cTriggerAdcResetDone_ms : signal is "TRUE";
attribute ASYNC_REG of cTriggerDacResetDone_ms : signal is "TRUE";
+ signal cTriggerAdcGearboxReset : std_logic;
+ signal cTriggerDacGearboxReset : std_logic;
+
+ signal dTriggerAdcGearboxReset : std_logic;
+ signal dTriggerDacGearboxReset : std_logic;
+
begin
-- rAdcEnableData is set to '1' as we don't control the flow of RX data.
rAdcEnableData <= '1';
- cTriggerAdcReset <= cSoftwareControl(kADC_RESET);
- cTriggerDacReset <= cSoftwareControl(kDAC_RESET);
+ cTriggerAdcReset <= cSoftwareControl(kADC_RESET);
+ cTriggerDacReset <= cSoftwareControl(kDAC_RESET);
+ cTriggerAdcGearboxReset <= cSoftwareControl(kADC_GEARBOX_RESET);
+ cTriggerDacGearboxReset <= cSoftwareControl(kDAC_GEARBOX_RESET);
cSoftwareStatus <= (
kADC_SEQ_DONE => cAdcResetDoneSticky,
@@ -169,6 +190,37 @@ begin
end if;
end process SwDacResetDone;
+ -----------------------------------------------------------------------------
+ -- transfer posedge gearbox triggers to DataClk domain
+ -----------------------------------------------------------------------------
+ adc_gearbox_reset_pulse_sync : pulse_synchronizer
+ generic map (
+ MODE => "POSEDGE",
+ STAGES => 2
+ )
+ port map (
+ clk_a => ConfigClk,
+ rst_a => '0',
+ pulse_a => cTriggerAdcGearboxReset,
+ busy_a => open,
+ clk_b => DataClk,
+ pulse_b => dTriggerAdcGearboxReset
+ );
+
+ dac_gearbox_reset_pulse_sync : pulse_synchronizer
+ generic map (
+ MODE => "POSEDGE",
+ STAGES => 2
+ )
+ port map (
+ clk_a => ConfigClk,
+ rst_a => '0',
+ pulse_a => cTriggerDacGearboxReset,
+ busy_a => open,
+ clk_b => DataClk,
+ pulse_b => dTriggerDacGearboxReset
+ );
+
-----------------------------------------------------------------------------
-- rf_reset Instances
-----------------------------------------------------------------------------
@@ -180,7 +232,7 @@ begin
RfClk => RfClk,
RfClk2x => RfClk2x,
DataClk2x => DataClk2x,
- dTimedReset => dAdcResetPulse,
+ dTimedReset => (dAdcResetPulse or dTriggerAdcGearboxReset),
dSwReset => dTriggerAdcReset,
dReset_n => dAdcDataOutReset_n,
d2Reset_n => open,
@@ -196,7 +248,7 @@ begin
RfClk => RfClk,
RfClk2x => RfClk2x,
DataClk2x => DataClk2x,
- dTimedReset => dDacResetPulse,
+ dTimedReset => (dDacResetPulse or dTriggerDacGearboxReset),
dSwReset => dTriggerDacReset,
dReset_n => dDacDataInReset_n,
d2Reset_n => d2DacFirReset_n,