fpga: lib: Add time_increment port to timekeeper
Adds a time_increment port for situations in which the parameter TIME_INCREMENT can't be used. They offer the same behavior. Original-commit: f9c97371048bfc69182187e6d8904a01efbe6d79
This commit is contained in:
committed by
Aaron Rossetto
parent
3bc803026b
commit
d6ca4f01fc
@@ -1,24 +1,46 @@
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//
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//
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// Copyright 2019 Ettus Research, a National Instruments Company
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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// Module: timekeeper
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// Module: timekeeper
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//
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//
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// Description: Timekeeper for RFNoC blocks. This block contains a 64-bit
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// Description:
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// counter to represent the current time in terms of sample clock cycles. The
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// counter can be updated and synchronized using the pps input.
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//
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//
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// WARNING: All register larger than a single 32-bit word should be read and
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// Timekeeper for RFNoC blocks. This block contains a 64-bit counter to
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// written least significant word first to guarantee coherency.
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// represent the current time in terms of sample clock cycles. The counter
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// can be updated and synchronized using the pps input.
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//
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// WARNING: All register larger than a single 32-bit word should be read and
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// written least significant word first to guarantee coherency.
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//
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// Parameters:
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//
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// BASE_ADDR : Base address for the internal CtrlPort registers.
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// TIME_INCREMENT : Amount by which to increment tb_timestamp for each radio
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// strobe. When 0, the time_increment input is used instead.
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//
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// Signals:
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//
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// tb_clk : Time-base clock
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// tb_rst : Time-base reset in tb_clk domain
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// s_ctrlport_clk : Clock for CtrlPort bus
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// s_ctrlport_* : CtrlPort bus for register access
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// time_increment : Amount by which to increment timestamp. This is
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// only used if TIME_INCREMENT parameter is 0.
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// sample_rx_stb : Sample Rx strobe (data valid indicator).
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// pps : Pulse-per-second input
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// tb_timestamp : 64-bit global timestamp synchronous to tb_clk
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// tb_timestamp_last_pps : 64-bit timestamp of the last PPS edge
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// tb_period_ns_q32 : Time Period of time-base in nanoseconds
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//
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//
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module timekeeper #(
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module timekeeper #(
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parameter BASE_ADDR = 'h00,
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parameter BASE_ADDR = 'h00,
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parameter TIME_INCREMENT = 1 // Amount by which to increment time on each sample clock cycle
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parameter TIME_INCREMENT = 1
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) (
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) (
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input wire tb_clk, // Time-base clock
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input wire tb_clk,
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input wire tb_rst, // Time-base reset in tb_clk domain
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input wire tb_rst,
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Control Interface
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// Control Interface
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@@ -33,14 +55,15 @@ module timekeeper #(
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output wire [31:0] s_ctrlport_resp_data,
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output wire [31:0] s_ctrlport_resp_data,
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Time
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// Time (tb_clk domain)
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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input wire sample_rx_stb, // Sample Rx strobe (data valid indicator)
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input wire [ 7:0] time_increment,
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input wire pps, // Pulse per second input
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input wire sample_rx_stb,
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output reg [63:0] tb_timestamp, // 64-bit global timestamp synchronous to tb_clk
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input wire pps,
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output reg [63:0] tb_timestamp_last_pps, // 64-bit global timestamp synchronous to tb_clk
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output reg [63:0] tb_timestamp,
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output reg [63:0] tb_period_ns_q32 // Time Period of time-base in nanoseconds
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output reg [63:0] tb_timestamp_last_pps,
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output reg [63:0] tb_period_ns_q32
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);
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);
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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@@ -230,6 +253,9 @@ module timekeeper #(
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// Time Tracker
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// Time Tracker
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//---------------------------------------------------------------------------
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//---------------------------------------------------------------------------
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// Amount by which to increment the timekeeper each clock cycle
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wire [31:0] increment = TIME_INCREMENT ? TIME_INCREMENT : time_increment;
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reg time_event_armed; // Boolean to indicate if we're expecting a timed event
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reg time_event_armed; // Boolean to indicate if we're expecting a timed event
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wire time_event =
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wire time_event =
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@@ -248,7 +274,7 @@ module timekeeper #(
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tb_timestamp <= time_at_next_event;
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tb_timestamp <= time_at_next_event;
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end else if (sample_rx_stb) begin
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end else if (sample_rx_stb) begin
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// Update time for each sample word received
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// Update time for each sample word received
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tb_timestamp <= tb_timestamp + TIME_INCREMENT;
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tb_timestamp <= tb_timestamp + increment;
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end
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end
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if (new_time_ctrl) begin
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if (new_time_ctrl) begin
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@@ -271,7 +297,7 @@ module timekeeper #(
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if (time_event) begin
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if (time_event) begin
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tb_timestamp_last_pps <= time_at_next_event;
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tb_timestamp_last_pps <= time_at_next_event;
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end else begin
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end else begin
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tb_timestamp_last_pps <= tb_timestamp + TIME_INCREMENT;
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tb_timestamp_last_pps <= tb_timestamp + increment;
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end
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end
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end
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end
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end
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end
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