fpga: lib: Add Xilinx FFT IP for various configurations

Original-commit: d96546d6391d10844e6ce0abd2e7e190b738365a
2024-12-17 22:13:42 +01:00
parent 4f99fee248
commit d46b94f233
15 changed files with 1836 additions and 2 deletions
@@ -0,0 +1,17 @@
+#
+# Copyright 2024 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+
+include $(TOOLS_DIR)/make/viv_ip_builder.mak
+
+LIB_IP_XFFT_2K_16B_SRCS = $(IP_BUILD_DIR)/xfft_2k_16b/xfft_2k_16b.xci
+
+LIB_IP_XFFT_2K_16B_OUTS = $(addprefix $(IP_BUILD_DIR)/xfft_2k_16b/, \
+xfft_2k_16b.xci.out \
+synth/xfft_2k_16b.vhd \
+)
+
+$(LIB_IP_XFFT_2K_16B_SRCS) $(LIB_IP_XFFT_2K_16B_OUTS) : $(LIB_IP_DIR)/xfft_2k_16b/xfft_2k_16b.xci
+	$(call BUILD_VIVADO_IP,xfft_2k_16b,$(ARCH),$(PART_ID),$(LIB_IP_DIR),$(IP_BUILD_DIR),0)