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fpga: tools: Add support for .sdc in Vivado

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viv_utils.tcl will now read files with the .sdc suffix using the
read_xdc Vivado command. This is especially useful when I/O timing
constraints in the FPGA and CPLD need to depend on a common constant.


Original-commit: b47b1a467ee5796dbce359ff34c9d55a6acebc82
This commit is contained in:
Paul Butler
2020-04-02 08:13:35 -05:00
committed by Wade Fife
parent 8bc01517ae
commit ce701301d0
1 changed files with 3 additions and 0 deletions
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tools/scripts/viv_utils.tcl
+3
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@@ -70,6 +70,9 @@ proc ::vivado_utils::initialize_project { {save_to_disk 0} } {
} elseif [expr [lsearch {.xdc} $src_ext] >= 0] { } elseif [expr [lsearch {.xdc} $src_ext] >= 0] {
puts "BUILDER: Adding XDC : $src_file" puts "BUILDER: Adding XDC : $src_file"
read_xdc $src_file read_xdc $src_file
} elseif [expr [lsearch {.sdc} $src_ext] >= 0] {
puts "BUILDER: Adding SDC : $src_file"
read_xdc $src_file
} elseif [expr [lsearch {.xci} $src_ext] >= 0] { } elseif [expr [lsearch {.xci} $src_ext] >= 0] {
puts "BUILDER: Adding IP : $src_file" puts "BUILDER: Adding IP : $src_file"
read_ip $src_file read_ip $src_file