fpga: x400: Add DRAM support
Original-commit: 19a333a2682898c4720a1316d4bcd6b3046d23ba
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@@ -47,6 +47,8 @@ include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_null_src_sink/Makefile.srcs
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include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_radio/Makefile.srcs
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include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_ddc/Makefile.srcs
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include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_duc/Makefile.srcs
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include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_axi_ram_fifo/Makefile.srcs
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include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_replay/Makefile.srcs
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# If out-of-tree modules want to be compiled into this image, then they need to
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# pass in the RFNOC_OOT_MAKEFILE_SRCS as a list of Makefile.srcs files.
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@@ -75,6 +77,7 @@ x4xx_versioning_regs.v \
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x4xx_dio.v \
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x4xx_gpio_atr.v \
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x4xx_gpio_spi.v \
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x4xx_dram.v \
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rf/100m/rf_core_100m.v \
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rf/200m/rf_core_200m.v \
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rf/200m/rf_down_4to2.v \
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@@ -99,7 +102,9 @@ MB_XDC = \
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constraints/pins/common.xdc \
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constraints/pins/rfdc_2x2.xdc \
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constraints/timing/shared_constants.sdc \
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constraints/timing/common.xdc
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constraints/timing/common.xdc \
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constraints/pins/dram.xdc \
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constraints/timing/dram.xdc
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# Definitions
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# MGT Types from x4xx_mgt_type.vh
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@@ -140,12 +145,6 @@ ifneq (,$(findstring QSFP1_3,$(EXTRA_DEFS)))
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MB_XDC += constraints/pins/qsfp1_3.xdc
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endif
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ifndef NO_DRAM_FIFOS
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DRAM_SRCS =
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else
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DRAM_SRCS =
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endif
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ifdef X410
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DESIGN_SRCS = $(abspath $(MB_XDC))
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endif
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@@ -165,6 +164,8 @@ $(RADIO_SRCS) $(CAP_GEN_GENERIC_SRCS) $(IP_XCI_SRCS) $(BD_SRCS) \
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$(RFNOC_SRCS) $(RFNOC_OOT_SRCS) $(LIB_IP_XCI_SRCS) $(LIB_HLS_IP_SRCS) $(LIBCOREGEN_SRCS) \
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$(RFNOC_BLOCK_DUC_SRCS) $(RFNOC_BLOCK_DDC_SRCS) \
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$(RFNOC_BLOCK_RADIO_SRCS) $(RFNOC_BLOCK_NULL_SRC_SINK_SRCS) \
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$(RFNOC_BLOCK_AXI_RAM_FIFO_SRCS) \
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$(RFNOC_BLOCK_REPLAY_SRCS) \
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$(DB_COMMON_SRCS) $(WHITE_RABBIT_SRCS) $(RFNOC_FRAMEWORK_SRCS) \
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$(WB_SPI_SRCS) $(RFNOC_XPORT_SV_SRCS) \
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)
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