fpga: lib: Add 2 to 1 gearbox module
Original-commit: 7f36cced81fb05d3cc107a0a0773fcdfc26f8d64
This commit is contained in:
committed by
Aaron Rossetto
parent
7fda8365de
commit
b7bd308e9c
@@ -0,0 +1,37 @@
|
||||
#
|
||||
# Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
#
|
||||
# SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
#
|
||||
|
||||
#-------------------------------------------------
|
||||
# Top-of-Makefile
|
||||
#-------------------------------------------------
|
||||
# Define BASE_DIR to point to the "top" dir.
|
||||
BASE_DIR = $(abspath ../../../../top)
|
||||
# Include viv_sim_preample after defining BASE_DIR
|
||||
include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
|
||||
|
||||
#-------------------------------------------------
|
||||
# Design Specific
|
||||
#-------------------------------------------------
|
||||
|
||||
DESIGN_SRCS += $(abspath \
|
||||
$(abspath ../../../control/gearbox_2x1.v) \
|
||||
)
|
||||
|
||||
#-------------------------------------------------
|
||||
# Testbench Specific
|
||||
#-------------------------------------------------
|
||||
SIM_TOP = gearbox_2x1_all_tb
|
||||
SIM_SRCS = \
|
||||
$(abspath gearbox_2x1_tb.sv) \
|
||||
$(abspath gearbox_2x1_all_tb.sv) \
|
||||
|
||||
#-------------------------------------------------
|
||||
# Bottom-of-Makefile
|
||||
#-------------------------------------------------
|
||||
# Include all simulator specific makefiles here
|
||||
# Each should define a unique target to simulate
|
||||
# e.g. xsim, vsim, etc and a common "clean" target
|
||||
include $(BASE_DIR)/../tools/make/viv_simulator.mak
|
||||
Reference in New Issue
Block a user