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fpga: x300: Update synchronizer constraint

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Original-commit: a270c531f07ea3549ec2f3b69a38b2c5298bf47c
This commit is contained in:
Wade Fife
2021-09-13 13:20:37 -05:00
parent 3c4c049943
commit ac0f45bb0e
1 changed files with 1 additions and 1 deletions
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top/x300/timing.xdc
+1 -1
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@@ -596,7 +596,7 @@ set_max_delay -to [get_pins {radio_reset_sync/reset_int*/PRE}] 10.000
#******************************************************************************* #*******************************************************************************
## Asynchronous paths ## Asynchronous paths
set_false_path -to [get_pins -hier -filter {NAME =~ */synchronizer_false_path/stages[0].value_reg[*]/D}] set_false_path -to [get_pins -hierarchical -filter {NAME =~ */synchronizer_false_path/stages[0].value_reg[0][*]/D}]
set_false_path -to [get_ports LED_*] set_false_path -to [get_ports LED_*]
set_false_path -to [get_ports {SFPP*_RS0 SFPP*_RS1 SFPP*_SCL SFPP*_SDA SFPP*_TxDisable}] set_false_path -to [get_ports {SFPP*_RS0 SFPP*_RS1 SFPP*_SCL SFPP*_SDA SFPP*_TxDisable}]
set_false_path -from [get_ports {SFPP*_ModAbs SFPP*_RxLOS SFPP*_SCL SFPP*_SDA SFPP*_TxFault}] set_false_path -from [get_ports {SFPP*_ModAbs SFPP*_RxLOS SFPP*_SCL SFPP*_SDA SFPP*_TxFault}]