fpga: x400: zbx: Add support for XO3 CPLD variant.

The main changes included are:
- Variant-dependent pin-out instantiation.
- Update clocking scheme in top level file
  to include XO3 PLL
- Add ability to shift outgoing data for
  the GPIO communication interface with
  the X410 FPGA.
- Include project files required to build
  the XO3 variant of the ZBX CPLD.
- Add build flow for Lattice Diamond designs.
- Add ability to build XO3 variant of ZBX CPLD.


Original-commit: 2c7813acb21383f302353a1b6cf57f0946fa0b6b

top/x400/dboards/zbx/cpld/lattice/ip/pll/pll.lpc

@@ -0,0 +1,87 @@
+[Device]
+Family=machxo3lf
+PartType=LCMXO3LF-9400C
+PartName=LCMXO3LF-9400C-6BG256I
+SpeedGrade=6
+Package=CABGA256
+OperatingCondition=IND
+Status=S
+
+[IP]
+VendorName=Lattice Semiconductor Corporation
+CoreType=LPM
+CoreStatus=Demo
+CoreName=PLL
+CoreRevision=5.8
+ModuleName=pll
+SourceFormat=Verilog HDL
+ParameterFileVersion=1.0
+Date=03/03/2022
+Time=14:15:48
+
+[Parameters]
+Verilog=1
+VHDL=0
+EDIF=1
+Destination=Synplicity
+Expression=None
+Order=None
+IO=0
+mode=Frequency
+CLKI=64
+CLKI_DIV=1
+BW=6.139
+VCO=512.000
+fb_mode=CLKOP
+CLKFB_DIV=1
+FRACN_ENABLE=0
+FRACN_DIV=0
+DynamicPhase=STATIC
+ClkEnable=1
+Standby=0
+Enable_sel=0
+PLLRst=0
+PLLMRst=0
+ClkOS2Rst=0
+ClkOS3Rst=0
+LockSig=1
+LockStk=0
+WBProt=0
+OPBypass=0
+OPUseDiv=0
+CLKOP_DIV=8
+FREQ_PIN_CLKOP=64
+OP_Tol=0.0
+CLKOP_AFREQ=64.000000
+CLKOP_PHASEADJ=0
+CLKOP_TRIM_POL=Rising
+CLKOP_TRIM_DELAY=0
+EnCLKOS=1
+OSBypass=0
+OSUseDiv=0
+CLKOS_DIV=8
+FREQ_PIN_CLKOS=64
+OS_Tol=0.0
+CLKOS_AFREQ=64.000000
+CLKOS_PHASEADJ=225
+CLKOS_TRIM_POL=Rising
+CLKOS_TRIM_DELAY=0
+EnCLKOS2=0
+OS2Bypass=0
+OS2UseDiv=0
+CLKOS2_DIV=1
+FREQ_PIN_CLKOS2=64
+OS2_Tol=0.0
+CLKOS2_AFREQ=64.000000
+CLKOS2_PHASEADJ=225
+EnCLKOS3=0
+OS3Bypass=0
+OS3UseDiv=0
+CLKOS3_DIV=1
+FREQ_PIN_CLKOS3=100
+OS3_Tol=0.0
+CLKOS3_AFREQ=
+CLKOS3_PHASEADJ=0
+
+[Command]
+cmd_line= -w -n pll -lang verilog -synth synplify -arch xo3c00f -type pll -fin 64 -fclkop 64 -fclkop_tol 0.0 -fclkos 64 -fclkos_tol 0.0 -trimp 0 -phasep 0 -trimp_r -trims 0 -phases 225 -trims_r -phase_cntl STATIC -enable_ports -fb_mode 1 -lock