fpga: x400: zbx: Add support for XO3 CPLD variant.

The main changes included are:
- Variant-dependent pin-out instantiation.
- Update clocking scheme in top level file
  to include XO3 PLL
- Add ability to shift outgoing data for
  the GPIO communication interface with
  the X410 FPGA.
- Include project files required to build
  the XO3 variant of the ZBX CPLD.
- Add build flow for Lattice Diamond designs.
- Add ability to build XO3 variant of ZBX CPLD.


Original-commit: 2c7813acb21383f302353a1b6cf57f0946fa0b6b

top/x400/dboards/zbx/cpld/lattice/build.tcl

@@ -0,0 +1,22 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+#
+#   This file contains the sequence of steps required to
+#   build and generate outputs for the ZBX CPLD, XO3 variant.
+#   It is intended to be use as a parameter for
+#   pnmainc (Diamond TCL console).
+#       pnmainc.exe build.tcl > <LOG_FILE_NAME>
+
+prj_project open "zbx_top_cpld.ldf"
+prj_run Synthesis -impl impl1
+prj_run Translate -impl impl1
+prj_run Map -impl impl1
+prj_run PAR -impl impl1
+prj_run PAR -impl impl1 -task PARTrace
+prj_run Export -impl impl1 -task Bitgen
+prj_run Export -impl impl1 -task Jedecgen
+prj_run Export -impl impl1 -task Jedec4Xo3l
+prj_project close