fpga: x400: zbx: Add support for XO3 CPLD variant.

The main changes included are:
- Variant-dependent pin-out instantiation.
- Update clocking scheme in top level file
  to include XO3 PLL
- Add ability to shift outgoing data for
  the GPIO communication interface with
  the X410 FPGA.
- Include project files required to build
  the XO3 variant of the ZBX CPLD.
- Add build flow for Lattice Diamond designs.
- Add ability to build XO3 variant of ZBX CPLD.


Original-commit: 2c7813acb21383f302353a1b6cf57f0946fa0b6b

tools/make/diamond_design_builder.mak

@@ -0,0 +1,33 @@
+#
+# Copyright 2022 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-2.0-or-later
+#
+
+include $(BASE_DIR)/../tools/make/diamond_preamble.mak
+SIMULATION = 0
+
+# -------------------------------------------------------------------
+# Usage: BUILD_DIAMOND_DESIGN
+# Args: $1 = PROJECT_NAME
+#       $2 = PART_ID (LCMXO3LF-9400C, etc)
+#       $3 = PROJECT_DIR (Absolute path to the top level project dir)
+#       $4 = BUILD_DIR (Absolute path to the top level build dir)
+#       $5 = IMPLEMENTATION_NAME (name of design implementation in project)
+# Prereqs:
+# - TOOLS_DIR must be defined globally
+# - DESIGN_SRCS must be defined and should contain all source files
+BUILD_DIAMOND_DESIGN = \
+	@ \
+	echo "========================================================"; \
+	echo "BUILDER: Building $(1) for $(2)"; \
+	echo "========================================================"; \
+	echo "BUILDER: Staging Diamond sources in build directory..."; \
+	cp -rf $(3)/lattice/* $(4)/;\
+	cd $(4); \
+	echo "BUILDER: Implementating design..."; \
+	pnmainc build.tcl > $(1)_log.txt ; \
+	echo "BUILDER: Generating bitfile..."; \
+	ddtcmd -oft -svfsingle -if $(5)/$(1)_$(5).jed			 	\
+		-dev $(2) -op "FLASH Erase,Program,Verify" -revd	\
+		-of $(5)/$(1)_$(5).svf;