miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fpga: Add incremental to strategies for e3xx, n3xx, x3xx

Browse Source 
Original-commit: 4b63ca00894944e03e7897f96316ab24cd5411d1
This commit is contained in:
Wade Fife
2024-03-14 16:35:11 -05:00
parent 629266db08
commit 9b6fc5d501
4 changed files with 17 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
top/e320/build_e320.tcl
+4 -1
View File
@@ -1,5 +1,7 @@
#
# Copyright 2016 Ettus Research
# Copyright 2024 Ettus Research, a National Instruments Brand
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#
source $::env(VIV_TOOLS_DIR)/scripts/viv_utils.tcl
@@ -14,6 +16,7 @@ vivado_utils::generate_post_synth_reports
# STEP#3: Run implementation strategy
set e3xx_strategy [dict create]
dict set e3xx_strategy "implementation.incremental" 0
dict set e3xx_strategy "opt_design.is_enabled" 1
dict set e3xx_strategy "opt_design.directive" "Default"
dict set e3xx_strategy "post_opt_power_opt_design.is_enabled" 0