fpga: tools: Add modelsim.excludes

This is a list of testbenches that don't work with ModelSim and should be excluded when running run_testbenches.py. Original-commit: 6190eca14ec13db7456a059cbd69c93550aa45c7
2021-06-17 08:16:59 -05:00
parent 4baf8139c8
commit 99a4250c0b
1 changed files with 18 additions and 0 deletions
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+#
+# Copyright 2021 Ettus Research, a National Instruments Brand
+#
+# SPDX-License-Identifier: LGPL-3.0-or-later
+#
+# This file contains all testbenches to exclude from the list discovered
+# by run_testbenches.py for the ModelSim simulator.
+#
+
+top/e31x/sim/dram_test
+top/n3xx/sim/arm_to_sfp_loopback
+top/n3xx/sim/aurora_loopback
+top/n3xx/sim/one_gig_eth_loopback
+top/n3xx/sim/ten_gig_eth_loopback
+top/x300/sim/x300_pcie_int
+
+# This TB doesn't pass in ModelSim
+top/x300/sim/dram_fifo_bist