fifo: replace synthesized simulation FIFO

Use the real axi_fifo_2clk hierarchy with XPM-based asynchronous FIFO implementations instead of synthesizing axi_fifo_2clk_sim.

Map the deep stream FIFOs into dedicated block RAM while preserving the legacy FWFT FIFO interface.

vivado/b210_k7/sources.tcl

@@ -2,12 +2,6 @@
 #
 # Exact source manifest for the reconstructed Kintex-7 B210 clone.
 #
-# IMPORTANT: This initial manifest intentionally reproduces the original
-# Vivado 2024.1 project, including its use of lib/sim/fifo/axi_fifo_2clk_sim.v
-# for synthesis. A later Git commit should replace that entry with the real
-# hardware FIFO hierarchy and XPM wrappers. Keeping the historical mistake in
-# this baseline makes the Git history accurately describe the repair.
-#
 # Paths are repository-relative and are deliberately explicit. Do not replace
 # these lists with recursive globs; doing so can accidentally pull simulation
 # sources into synthesis.
@@ -31,7 +25,10 @@ set B210_HDL_SOURCES {
     lib/fifo/axi_fifo.v
     lib/fifo/axi_fifo32_to_fifo64.v
     lib/fifo/axi_fifo64_to_fifo32.v
-    lib/sim/fifo/axi_fifo_2clk_sim.v
+    lib/fifo/axi_fifo_2clk.v
+    lib/fifo/fifo_short_2clk.v
+    lib/fifo/fifo_4k_2clk.v
+    lib/fifo/fifo_2clk_xpm_core.v
     lib/fifo/axi_fifo_bram.v
     lib/fifo/axi_fifo_flop.v
     lib/fifo/axi_fifo_flop2.v