ci: Update FPGA CI pipelines to match new image builder

- Removes target names for X3x0 and X4x0 builds (these are now encoded
  in the YAML file)
- Change the image core YAML file names referenced in the pipeline YAMLs
  to match the contents of fpga/usrp3/top/x?00/*.yml
- Remove X410_XG_100 image since it is not a shipping image
- Add image_core_name arguments for all E320, E31x, N3xx targets


Original-commit: 50e07a5b42d4a244c12b5a13b51048573d0069ec

tools/utils/repeat_fpga_build.py

@@ -42,6 +42,11 @@ def parse_args():
         help="For using the image builder instead of make, use this to specify "
         "the image core YAML.",
     )
+    parser.add_argument(
+        "--image-core-name",
+        type=str,
+        help="Specifies the image core name to pass to rfnoc_image_builder using the -n argument.",
+    )
     parser.add_argument(
         "--num",
         "-n",
@@ -71,7 +76,7 @@ def parse_args():
     return parser.parse_args()
 
 
-def prepare_build(target, image_core):
+def prepare_build(target, image_core, image_core_name):
     """
     Run tasks to prepare the build. In particular, execute the RFNoC image builder
     if desired.
@@ -88,6 +93,8 @@ def prepare_build(target, image_core):
         ]
         if target:
             cmd += ["--target", target]
+        if image_core_name:
+            cmd += ["--image_core_name", image_core_name]
         result = subprocess.run(
             cmd,
             check=False,
@@ -186,7 +193,7 @@ def main():
         return 1
     build_seed = args.seed
     status = 128
-    cfg = prepare_build(args.target, args.image_core)
+    cfg = prepare_build(args.target, args.image_core, args.image_core_name)
     try:
         for build_num in range(1, args.num + 1):
             logging.info("Starting FPGA build %d with seed %s", build_num, build_seed)