miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fpga: lib: Add more CtrlPort constants

Browse Source 
Add some missing CtrlPort signal widths to ctrlport.vh.


Original-commit: c9d55d870dbccbc07ca9a7afaf2e0ac64944111c
This commit is contained in:
Wade Fife
2020-08-19 12:28:22 -05:00
parent 066948f87d
commit 845dfd4f87
1 changed files with 13 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/rfnoc/core/ctrlport.vh
+13 -8
View File
@@ -1,21 +1,26 @@
//
// Copyright 2019 Ettus Research, A National Instruments Company
// Copyright 2020 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: ctrlport.vh
// Description:
// Defines constants for the control port interface.
//
// Requires rfnoc_axis_ctrl_utils.vh in same directory to be
// included first.
// Description:
//
// Defines constants for the control port interface. See also
// rfnoc_axis_ctrl_utils.vh for related AXIS-Ctrl definitions.
//
//---------------------------------------------------------------
// Signal widths
//---------------------------------------------------------------
localparam CTRLPORT_ADDR_W = 20;
localparam CTRLPORT_DATA_W = 32;
localparam CTRLPORT_STS_W = 2;
localparam CTRLPORT_ADDR_W = 20;
localparam CTRLPORT_DATA_W = 32;
localparam CTRLPORT_STS_W = 2;
localparam CTRLPORT_PORTID_W = 10;
localparam CTRLPORT_REM_EPID_W = 16;
localparam CTRLPORT_BYTE_EN_W = 4;
localparam CTRLPORT_TIME_W = 64;
//---------------------------------------------------------------
// Status values