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fpga: Add option to specify build output directory

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Original-commit: 58fb72a82da8bb638dbdfe44d3be84e8382c10a2
This commit is contained in:
Wade Fife
2024-03-15 20:08:15 -05:00
parent 600df8752c
commit 822d1bd26d
7 changed files with 138 additions and 127 deletions
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top/e31x/Makefile
+19 -18
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@@ -10,12 +10,14 @@
## make <Targets> <Options>
##
##Output:
## build/usrp_<product>_fpga_<image_type>.bit: Configuration bitstream with header
## build/usrp_<product>_fpga_<image_type>.dts: Device tree source file
## build/usrp_<product>_fpga_<image_type>.rpt: Build report (includes utilization and timing summary)
## $(BUILD_OUTPUT_DIR)/usrp_<product>_fpga_<image_type>.bit: Configuration bitstream with header
## $(BUILD_OUTPUT_DIR)/usrp_<product>_fpga_<image_type>.dts: Device tree source file
## $(BUILD_OUTPUT_DIR)/usrp_<product>_fpga_<image_type>.rpt: Build report (includes utilization and timing summary)
# Base output directory for all builds
# Base output directory for all builds.
BUILD_BASE_DIR ?= .
# Base directory for the build outputs.
BUILD_OUTPUT_DIR ?= $(BUILD_BASE_DIR)/build
# Initialize a build seed. This can be changed to randomly affect build results.
BUILD_SEED ?= 0
@@ -45,11 +47,11 @@ vivado_ip = make -f Makefile.e31x.inc viv_ip NAME=$@ ARCH=$(XIL_ARCH_$1) P
# post_build($1=Device, $2=Option)
ifeq ($(TARGET),bin)
post_build = @\
mkdir -p build; \
mkdir -p $(BUILD_OUTPUT_DIR); \
echo "Exporting bitstream file..."; \
cp $(BUILD_BASE_DIR)/build-$(1)/e31x.bit build/usrp_`echo $(2) | tr A-Z a-z`_fpga.bit; \
cp $(BUILD_BASE_DIR)/build-$(1)/e31x.bit $(BUILD_OUTPUT_DIR)/usrp_`echo $(2) | tr A-Z a-z`_fpga.bit; \
echo "Exporting build report..."; \
cp $(BUILD_BASE_DIR)/build-$(1)/build.rpt build/usrp_`echo $(2) | tr A-Z a-z`_fpga.rpt; \
cp $(BUILD_BASE_DIR)/build-$(1)/build.rpt $(BUILD_OUTPUT_DIR)/usrp_`echo $(2) | tr A-Z a-z`_fpga.rpt; \
echo "Build DONE ... $(1)";
else
post_build = @echo "Skipping bitfile export."
@@ -70,40 +72,39 @@ E310_SG3_IP:
+$(call vivado_ip,E310_SG3,E310_SG3=1)
##E310_SG1_IDLE: Build USRP E3XX idle design (Speed Grade 1).
E310_SG1_IDLE E3XX_idle: E310_SG1_IP build/usrp_e310_sg1_idle_fpga.dts
E310_SG1_IDLE E3XX_idle: E310_SG1_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg1_idle_fpga.dts
$(call vivado_build,E310_SG1,$(DEFS) E310_IDLE_IMAGE=1 E310_SG1=1)
$(call post_build,$@,E310_SG1_IDLE)
##E310_SG3_IDLE: Build USRP E3XX idle design (Speed Grade 3).
E310_SG3_IDLE E3XX_idle_sg3: E310_SG3_IP build/usrp_e310_sg3_idle_fpga.dts
E310_SG3_IDLE E3XX_idle_sg3: E310_SG3_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg3_idle_fpga.dts
$(call vivado_build,E310_SG3,$(DEFS) E310_IDLE_IMAGE=1 E310_SG3=1)
$(call post_build,$@,E310_SG3_IDLE)
##E310_SG1: Build USRP E3XX (Speed Grade 1).
E310_SG1 E310: E310_SG1_IP build/usrp_e310_sg1_fpga.dts
E310_SG1 E310: E310_SG1_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg1_fpga.dts
$(call vivado_build,E310_SG1,$(DEFS) E310_SG1=1 $(if $(DRAM),ENABLE_DRAM=1,))
$(call post_build,$@,E310_SG1)
##E310_SG3: Build USRP E3XX (Speed Grade 3).
E310_SG3 E310_sg3: E310_SG3_IP build/usrp_e310_sg3_fpga.dts
E310_SG3 E310_sg3: E310_SG3_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg3_fpga.dts
$(call vivado_build,E310_SG3,$(DEFS) E310_SG3=1 $(if $(DRAM),ENABLE_DRAM=1,))
$(call post_build,$@,E310_SG3)
build/%.dts: dts/%.dts dts/*.dtsi
-mkdir -p build
$(BUILD_OUTPUT_DIR)/%.dts: dts/%.dts dts/*.dtsi
-mkdir -p $(BUILD_OUTPUT_DIR)
${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $<
clean: ##Clean up all target build outputs.
@echo "Cleaning targets..."
@rm -rf build-E3*
@rm -rf build
@rm -rf $(BUILD_BASE_DIR)/build-E3*
@rm -rf $(BUILD_OUTPUT_DIR)
cleanall: ##Clean up all target and ip build outputs.
@echo "Cleaning targets and IP..."
@rm -rf build-ip
@rm -rf build-E3*
@rm -rf build
@rm -rf $(BUILD_BASE_DIR)/build-E3*
@rm -rf $(BUILD_OUTPUT_DIR)
help: ##Show this help message.
@grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//'