miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fpga: Add option to specify build output directory

Browse Source 
Original-commit: 58fb72a82da8bb638dbdfe44d3be84e8382c10a2
This commit is contained in:
Wade Fife
2024-03-15 20:08:15 -05:00
parent 600df8752c
commit 822d1bd26d
7 changed files with 138 additions and 127 deletions
Download Patch File Download Diff File Expand all files Collapse all files
tools/make/viv_preamble.mak
+4 -2
View File
@@ -27,7 +27,10 @@ SIMLIB_DIR = $(abspath $(BASE_DIR)/../sim)
LIB_IP_DIR = $(abspath $(LIB_DIR)/ip)
HLS_IP_DIR = $(abspath $(LIB_DIR)/hls)
BUILD_BASE_DIR ?= .
MAKEFILE_DIR = $(abspath .)
IP_BUILD_DIR ?= $(abspath ./build-ip/$(subst /,,$(PART_ID)))
BUILD_BASE_DIR ?= $(abspath .)
ifdef NAME
BUILD_DIR = $(abspath $(BUILD_BASE_DIR)/build-$(NAME))
@@ -35,7 +38,6 @@ else
BUILD_DIR = $(abspath $(BUILD_BASE_DIR)/build)
endif
IP_BUILD_DIR = $(abspath ./build-ip/$(subst /,,$(PART_ID)))
# -------------------------------------------------------------------
# Git Hash Retrieval