fpga: rfnoc: Add new FFT block
This replaces the legacy RFNoC FFT block with a new one of the same name that includes a superset of the original features. New features include cyclic prefix insertion or removal and FFT sizes up to 64k. Original-commit: 25fffb006755b2e91f0138eb4af3ab9e16b8690c
This commit is contained in:
Wade Fife
committed by
Jörg Hofrichter
Jörg Hofrichter
parent
0770fd4405
commit
81f150213f
@@ -0,0 +1,378 @@
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//
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// Copyright 2024 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: fft_post_processing
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//
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// Description:
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//
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// This module contains the optional post-processing stages of an FFT,
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// including FFT output reordering, magnitude, and magnitude-squared
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// calculations.
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//
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// For the magnitude, the result is clipped to a signed 16-bit result in the
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// range [0, 0x7FFF]. The result is placed in the real part of the sc16
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// output (the upper 16 bits) and the imaginary part (the lower 16 bits) is
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// set to 0.
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//
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// For the magnitude squared, it computes (i^2 + q^2) / 0x8000, rounding and
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// clipping the result to a signed 16-bit value in the range [0, 0x7FFF]. The
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// division helps to avoid saturation and to put the result in a useful
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// range. The result is placed in the real part of the sc16 output (the upper
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// 16 bits) and the imaginary part (the lower 16 bits) is set to 0.
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//
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// Note that the I and Q may be swapped in the RFNoC transport adapter, so
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// this order will likely be reversed by the time it makes it back to a host
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// computer.
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//
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// Parameters:
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//
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// EN_FFT_ORDER : Set to 1 to add the optional FFT reorder core. Set to
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// 0 to remove it and save resources.
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// EN_CP_INSERTION : Controls whether to include the cyclic prefix
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// insertion logic, which is a subset of EN_FFT_ORDER.
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// EN_MAGNITUDE : Set to 1 to add the magnitude output calculation core.
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// Set to 0 to remove it and save resources.
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// EN_MAGNITUDE_SQ : Set to 1 to add the magnitude squared output
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// calculation core. Set to 0 to remove it and save
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// resources.
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// USE_APPROX_MAG : Controls which magnitude calculation to use. Set to 1
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// to use a simpler circuit that gives pretty good
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// results in order to save resources. Set to 0 to use
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// the CORDIC IP to calculate the magnitude.
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// MAX_FFT_SIZE_LOG2 : Set to the log base 2 of the maximum FFT size to be
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// supported. For example, a value of 14 means the
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// maximum FFT size is 2**14 = 4096.
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//
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// Signals:
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//
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// fft_order_sel : 0 - Normal (0 Hz in the center)
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// 1 - Reverse (same as normal but in reverse)
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// 2 - Natural (0 Hz on the left)
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// magnitude_sel : 0 - Normal complex output (No magnitude calculation)
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// 1 - Magnitude output
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// 2 - Magnitude-squared output
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// fft_size_log2 : Log base-2 of the FFT size. That is, the FFT size is
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// exactly 2**fft_size_log2. The packet size must match.
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// s_axis_* : AXI-Stream data input. s_axis_tuser contains the cyclic
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// prefix length and must be valid on the first transfer of
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// the packet.
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// m_axis_* : AXI-Stream data output
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`default_nettype none
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module fft_post_processing #(
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bit EN_FFT_ORDER = 1,
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bit EN_CP_INSERTION = 1,
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bit EN_MAGNITUDE = 1,
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bit EN_MAGNITUDE_SQ = 1,
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bit USE_APPROX_MAG = 1,
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int MAX_FFT_SIZE_LOG2 = 12,
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localparam int FFT_SIZE_LOG2_W = $clog2(MAX_FFT_SIZE_LOG2+1),
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localparam int CP_LEN_W = MAX_FFT_SIZE_LOG2
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) (
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input wire clk,
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input wire rst,
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input wire [1:0] fft_order_sel,
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input wire [1:0] magnitude_sel,
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input wire [FFT_SIZE_LOG2_W-1:0] fft_size_log2,
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input wire [ 31:0] s_axis_tdata,
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input wire [CP_LEN_W-1:0] s_axis_tuser,
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input wire s_axis_tlast,
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input wire s_axis_tvalid,
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output wire s_axis_tready,
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output wire [31:0] m_axis_tdata,
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output wire m_axis_tlast,
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output wire m_axis_tvalid,
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input wire m_axis_tready
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);
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//---------------------------------------------------------------------------
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// FFT Reorder
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//---------------------------------------------------------------------------
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import fft_reorder_pkg::*;
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wire [31:0] reorder_tdata;
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wire reorder_tlast;
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wire reorder_tvalid;
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wire reorder_tready;
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if (EN_FFT_ORDER) begin : gen_fft_reorder
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logic [1:0] old_fft_order_sel;
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logic [FFT_SIZE_LOG2_W-1:0] old_fft_size_log2;
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logic fft_cfg_wr;
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// Update the FFT config whenever it changes
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always_ff @(posedge clk) begin
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fft_cfg_wr <= 0;
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if (
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(old_fft_order_sel != fft_order_sel) ||
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(old_fft_size_log2 != fft_size_log2)
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) begin
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fft_cfg_wr <= 1;
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end
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old_fft_order_sel <= fft_order_sel;
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old_fft_size_log2 <= fft_size_log2;
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end
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fft_reorder #(
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.INPUT_ORDER (BIT_REVERSE),
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.MAX_FFT_LEN_LOG2(MAX_FFT_SIZE_LOG2),
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.DATA_W (32),
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.EN_CP_INSERTION (EN_CP_INSERTION)
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) fft_reorder_i (
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.clk (clk),
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.rst (rst),
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.fft_cfg_wr (fft_cfg_wr),
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.fft_len_log2 (fft_size_log2),
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.fft_out_order(fft_order_t'(fft_order_sel)),
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.i_tdata (s_axis_tdata),
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.i_tuser (s_axis_tuser),
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.i_tlast (s_axis_tlast),
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.i_tvalid (s_axis_tvalid),
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.i_tready (s_axis_tready),
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.o_tdata (reorder_tdata),
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.o_tlast (reorder_tlast),
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.o_tvalid (reorder_tvalid),
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.o_tready (reorder_tready)
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);
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end else begin : gen_no_fft_reorder
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// Pass the data directly through when reordering is disabled.
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assign reorder_tdata = s_axis_tdata;
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assign reorder_tlast = s_axis_tlast;
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assign reorder_tvalid = s_axis_tvalid;
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assign s_axis_tready = reorder_tready;
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end
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//---------------------------------------------------------------------------
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// Demultiplex Magnitude Options
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//---------------------------------------------------------------------------
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wire [31:0] mag_bypass_tdata;
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wire mag_bypass_tlast;
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wire mag_bypass_tvalid;
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wire mag_bypass_tready;
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wire [31:0] mag_in_tdata;
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wire mag_in_tlast;
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wire mag_in_tvalid;
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wire mag_in_tready;
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wire [31:0] mag_sq_in_tdata;
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wire mag_sq_in_tlast;
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wire mag_sq_in_tvalid;
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wire mag_sq_in_tready;
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if (EN_MAGNITUDE || EN_MAGNITUDE_SQ) begin : gen_mag_demux
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axi_demux #(
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.WIDTH (32),
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.SIZE (3),
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.PRE_FIFO_SIZE (0),
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.POST_FIFO_SIZE(0)
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) axi_demux_i (
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.clk (clk),
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.reset (rst),
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.clear (1'b0),
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.header (),
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.dest (magnitude_sel),
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.i_tdata (reorder_tdata),
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.i_tlast (reorder_tlast),
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.i_tvalid(reorder_tvalid),
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.i_tready(reorder_tready),
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.o_tdata ({mag_sq_in_tdata , mag_in_tdata , mag_bypass_tdata }),
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.o_tlast ({mag_sq_in_tlast , mag_in_tlast , mag_bypass_tlast }),
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.o_tvalid({mag_sq_in_tvalid, mag_in_tvalid, mag_bypass_tvalid}),
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.o_tready({mag_sq_in_tready, mag_in_tready, mag_bypass_tready})
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);
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end
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//---------------------------------------------------------------------------
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// Magnitude
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//---------------------------------------------------------------------------
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wire [31:0] mag_out_tdata;
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wire mag_out_tlast;
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wire mag_out_tvalid;
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wire mag_out_tready;
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if (EN_MAGNITUDE) begin : gen_magnitude
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wire [16:0] round_in_tdata;
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wire [31:0] round_in_tdata_tmp;
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wire round_in_tlast;
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wire round_in_tvalid;
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wire round_in_tready;
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wire [15:0] mag_out_tdata_tmp;
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if (!USE_APPROX_MAG) begin : gen_cordic
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wire [47:0] m_axis_dout_tdata;
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// The CORDIC IP below inputs/outputs its data as signed numbers having 2
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// whole bits and 15 fractional bits (17 total bits). To be compliant
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// with AXI, each value is stuffed into a 24-bit vector. On the input, we
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// resize our sc16 inputs to be 24 bits (the upper 7 bits will be ignored
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// by the IP). On the output side, we only need the magnitude, which is
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// in the lower 17 bits. The phase, in the upper bits, is left unused.
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complex_to_magphase_int17 complex_to_magphase_int17_i (
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.aclk (clk),
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.aresetn (~rst),
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.s_axis_cartesian_tvalid(mag_in_tvalid),
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.s_axis_cartesian_tlast (mag_in_tlast),
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.s_axis_cartesian_tready(mag_in_tready),
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.s_axis_cartesian_tdata ({ 24'(signed'(mag_in_tdata[31:16])),
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24'(signed'(mag_in_tdata[15:0])) }),
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.m_axis_dout_tvalid (round_in_tvalid),
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.m_axis_dout_tlast (round_in_tlast),
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.m_axis_dout_tdata (m_axis_dout_tdata),
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.m_axis_dout_tready (round_in_tready)
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);
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assign round_in_tdata_tmp = 32'(m_axis_dout_tdata[16:0]);
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end else if (USE_APPROX_MAG) begin : gen_approx
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complex_to_mag_approx complex_to_mag_approx_i (
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.clk (clk),
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.reset (rst),
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.clear (1'b0),
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.i_tvalid(mag_in_tvalid),
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.i_tlast (mag_in_tlast),
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.i_tready(mag_in_tready),
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.i_tdata (mag_in_tdata),
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.o_tvalid(round_in_tvalid),
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.o_tlast (round_in_tlast),
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.o_tready(round_in_tready),
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.o_tdata (round_in_tdata_tmp[15:0])
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);
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assign round_in_tdata_tmp[31:16] = '0;
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end
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// The magnitude is always positive, so we set the MSB to 0 then clip the
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// result to a signed 16-bit value.
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assign round_in_tdata = {1'b0, round_in_tdata_tmp[15:0]};
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axi_round_and_clip #(
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.WIDTH_IN (17),
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.WIDTH_OUT(16),
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.CLIP_BITS(1)
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) axi_round_and_clip_i (
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.clk (clk),
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.reset (rst),
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.i_tdata (round_in_tdata),
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.i_tlast (round_in_tlast),
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.i_tvalid(round_in_tvalid),
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.i_tready(round_in_tready),
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.o_tdata (mag_out_tdata_tmp),
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.o_tlast (mag_out_tlast),
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.o_tvalid(mag_out_tvalid),
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.o_tready(mag_out_tready)
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);
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// Put the resulting magnitude in the "real" part of the output
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assign mag_out_tdata = {mag_out_tdata_tmp, 16'd0};
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end else begin : gen_no_magnitude
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assign mag_out_tdata = '0;
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assign mag_out_tlast = '0;
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assign mag_out_tvalid = '0;
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assign s_axis_tready = '1;
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end
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//---------------------------------------------------------------------------
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// Magnitude Squared
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//---------------------------------------------------------------------------
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wire [31:0] mag_sq_out_tdata;
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wire mag_sq_out_tlast;
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wire mag_sq_out_tvalid;
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wire mag_sq_out_tready;
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if (EN_MAGNITUDE_SQ) begin : gen_magnitude_squared
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wire [31:0] round_in_tdata;
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wire round_in_tlast;
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wire round_in_tvalid;
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wire round_in_tready;
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wire [15:0] mag_sq_out_tdata_tmp;
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complex_to_magsq complex_to_magsq_i (
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.clk (clk),
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.reset (rst),
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.clear (1'b0),
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.i_tvalid(mag_sq_in_tvalid),
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.i_tlast (mag_sq_in_tlast),
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.i_tready(mag_sq_in_tready),
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.i_tdata (mag_sq_in_tdata),
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.o_tvalid(round_in_tvalid),
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.o_tlast (round_in_tlast),
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.o_tready(round_in_tready),
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.o_tdata (round_in_tdata)
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);
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axi_round_and_clip #(
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.WIDTH_IN (32),
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.WIDTH_OUT(16),
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.CLIP_BITS(1)
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) axi_round_and_clip_i (
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.clk (clk),
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.reset (rst),
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.i_tdata (round_in_tdata),
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.i_tlast (round_in_tlast),
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.i_tvalid(round_in_tvalid),
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.i_tready(round_in_tready),
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.o_tdata (mag_sq_out_tdata_tmp),
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.o_tlast (mag_sq_out_tlast),
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.o_tvalid(mag_sq_out_tvalid),
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.o_tready(mag_sq_out_tready)
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);
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assign mag_sq_out_tdata = {mag_sq_out_tdata_tmp, 16'd0};
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end else begin : gen_no_magnitude_squared
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assign mag_sq_out_tdata = '0;
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assign mag_sq_out_tlast = '0;
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assign mag_sq_out_tvalid = '0;
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assign mag_sq_in_tready = '1;
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end
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//---------------------------------------------------------------------------
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// Combine Magnitude Options
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//---------------------------------------------------------------------------
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if (EN_MAGNITUDE || EN_MAGNITUDE_SQ) begin : gen_mag_mux
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axi_mux #(
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.PRIO (1),
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.WIDTH (32),
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.SIZE (3),
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.PRE_FIFO_SIZE (0),
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.POST_FIFO_SIZE(0)
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) axi_demux_i (
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.clk (clk),
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.reset (rst),
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.clear (1'b0),
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.i_tdata ({mag_sq_out_tdata , mag_out_tdata , mag_bypass_tdata }),
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.i_tlast ({mag_sq_out_tlast , mag_out_tlast , mag_bypass_tlast }),
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.i_tvalid({mag_sq_out_tvalid, mag_out_tvalid, mag_bypass_tvalid}),
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.i_tready({mag_sq_out_tready, mag_out_tready, mag_bypass_tready}),
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.o_tdata (m_axis_tdata),
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.o_tlast (m_axis_tlast),
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.o_tvalid(m_axis_tvalid),
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.o_tready(m_axis_tready)
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);
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end else begin : gen_no_mag_mux
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assign m_axis_tdata = reorder_tdata;
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assign m_axis_tlast = reorder_tlast;
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assign m_axis_tvalid = reorder_tvalid;
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assign reorder_tready = m_axis_tready;
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end
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endmodule : fft_post_processing
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`default_nettype wire
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