fpga: x400: Remove CPU_W parameter

Removes the CPU_W parameter from x4xx.v and the qsfp_wrapper files. The
value of this parameter depends on the axi_eth_dma IP and therefore
should not be changed.


Original-commit: 84c49f40adc980e2968a6a844b4bdbb2d2d38c9c

top/x400/sim/x4xx_qsfp_wrapper/x4xx_qsfp_wrapper_tb.sv

@@ -180,10 +180,8 @@ module x4xx_qsfp_wrapper_tb #(
     .PROTOCOL1     (PROTOCOL1),
     .PROTOCOL2     (PROTOCOL2),
     .PROTOCOL3     (PROTOCOL3),
-
+    .CHDR_W        (CHDR_W),
-    .CPU_W        (CPU_W),
+    .PORTNUM       (0)
-    .CHDR_W       (CHDR_W),
-    .PORTNUM      (0)
   ) dut (
     .areset          (refclk_rst),
     .refclk_p        (refclk_p),

top/x400/x4xx.v

@@ -295,7 +295,6 @@ module x4xx (
   localparam NET_CHDR_W     = ENET_W;
   localparam CHDR_W         = `CHDR_WIDTH;
   localparam DMA_W          = `CHDR_WIDTH;
-  localparam CPU_W          = 64;
 
   localparam REG_AWIDTH     = 15;
   localparam REG_DWIDTH     = 32;
@@ -1671,7 +1670,6 @@ module x4xx (
       `ifdef QSFP0_3
       .PROTOCOL3      (`QSFP0_3),
       `endif
-      .CPU_W          (CPU_W),
       .CHDR_W         (QSFP0_W),
       .NET_CHDR_W     (NET_CHDR_W),
       .BYTE_MTU       (BYTE_MTU),
@@ -1789,7 +1787,6 @@ module x4xx (
       `ifdef QSFP1_3
       .PROTOCOL3      (`QSFP1_3),
       `endif
-      .CPU_W          (CPU_W),
       .CHDR_W         (QSFP1_W),
       .NET_CHDR_W     (NET_CHDR_W),
       .BYTE_MTU       (BYTE_MTU),

top/x400/x4xx_qsfp_wrapper.sv

@@ -14,7 +14,6 @@
 //
 //   PROTOCOL       : Indicates the protocol to use for each of the 4 QSFP
 //                    lanes. See x4xx_mgt_types.vh for possible values.
-//   CPU_W          : Width of CPU interface
 //   CHDR_W         : CHDR bus width
 //   NET_CHDR_W     : CHDR width used over the network connection
 //   BYTE_MTU       : Transport MTU in bytes
@@ -32,7 +31,6 @@ module x4xx_qsfp_wrapper #(
                                       `MGT_Disabled,
                                       `MGT_Disabled,
                                       `MGT_Disabled},
-  parameter         CPU_W          = 64,
   parameter         CHDR_W         = 64,
   parameter         NET_CHDR_W     = CHDR_W,
   parameter         BYTE_MTU       = $clog2(8*1024),
@@ -85,6 +83,7 @@ module x4xx_qsfp_wrapper #(
 
   localparam REG_BASE_SFP_IO      = 14'h0;
   localparam REG_BASE_ETH_SWITCH  = 14'h1000;
+  localparam CPU_W                = 64;     // Must match axi_eth_dma IP
   localparam CPU_USER_W           = $clog2(CPU_W/8)+1;
   localparam CHDR_USER_W          = $clog2(CHDR_W/8);
   localparam REG_DWIDTH           = 32;

top/x400/x4xx_qsfp_wrapper_temp.sv

@@ -13,7 +13,6 @@
 //
 //   PROTOCOL       : Indicates the protocol to use for each of the 4 QSFP
 //                    lanes. See x4xx_mgt_types.vh for possible values.
-//   CPU_W          : Width of CPU interface
 //   CHDR_W         : CHDR width used by RFNoC on the FPGA
 //   NET_CHDR_W     : CHDR width used over the network connection
 //   BYTE_MTU       : Transport MTU in bytes
@@ -30,7 +29,6 @@ module x4xx_qsfp_wrapper_temp #(
   parameter        PROTOCOL1      = `MGT_Disabled,
   parameter        PROTOCOL2      = `MGT_Disabled,
   parameter        PROTOCOL3      = `MGT_Disabled,
-  parameter        CPU_W          = 64,
   parameter        CHDR_W         = 64,
   parameter        NET_CHDR_W     = CHDR_W,
   parameter        BYTE_MTU       = $clog2(8*1024),
@@ -150,7 +148,6 @@ module x4xx_qsfp_wrapper_temp #(
   //---------------------------------------------------------------------------
 
   localparam CHDR_USER_W = $clog2(CHDR_W/8);
-  localparam CPU_USER_W  = $clog2(CPU_W/8)+1;
 
   // AXI-Stream for RFNoC CHDR
   AxiStreamIf #(.DATA_WIDTH(CHDR_W), .USER_WIDTH(CHDR_USER_W),
@@ -302,7 +299,6 @@ module x4xx_qsfp_wrapper_temp #(
 
   x4xx_qsfp_wrapper #(
     .PROTOCOL       ({ PROTOCOL3, PROTOCOL2, PROTOCOL1, PROTOCOL0 }),
-    .CPU_W          (CPU_W),
     .CHDR_W         (CHDR_W),
     .NET_CHDR_W     (NET_CHDR_W),
     .BYTE_MTU       (BYTE_MTU),