Removed copy of FPGA source files.

Original-commit: fd3e84941de463fa1a7ebab0a69515b4bf2614cd
This commit is contained in:
Martin Braun
2014-10-07 11:25:20 +02:00
parent 56e84828fe
commit 74893643ca
2415 changed files with 0 additions and 1492030 deletions
-15
View File
@@ -1,15 +0,0 @@
#
# Clock constraints
#
NET "CLK" TNM_NET = D_CLK ;
INST "U0/*/U_STAT/U_DIRTY_LDC" TNM = D2_CLK;
TIMESPEC TS_D2_TO_T2_chipscope_ila_256 = FROM D2_CLK TO "FFS" TIG;
TIMESPEC TS_J2_TO_D2_chipscope_ila_256 = FROM "FFS" TO D2_CLK TIG;
TIMESPEC TS_J3_TO_D2_chipscope_ila_256 = FROM "FFS" TO D2_CLK TIG;
TIMESPEC TS_J4_TO_D2_chipscope_ila_256 = FROM "FFS" TO D2_CLK TIG;
#
# Input keep/save net constraints
#
NET "TRIG0<*" S;
NET "TRIG0<*" KEEP;