Removed copy of FPGA source files.

Original-commit: fd3e84941de463fa1a7ebab0a69515b4bf2614cd
2014-10-07 11:25:20 +02:00
parent 56e84828fe
commit 74893643ca
2415 changed files with 0 additions and 1492030 deletions
@@ -1,9 +0,0 @@
-NET "U0/U_ICON/*/iDRCK_LOCAL" TNM_NET = J_CLK ;
-TIMESPEC TS_J_CLK = PERIOD J_CLK 30 ns ;
-#Update Constraints
-NET "U0/iUPDATE_OUT" TNM_NET = U_CLK ;
-NET "U0/iSHIFT_OUT" TIG ;
-TIMESPEC TS_U_TO_J = FROM U_CLK TO J_CLK 15 ns ;
-TIMESPEC TS_U_TO_U = FROM U_CLK TO U_CLK 15 ns ;
-TIMESPEC TS_J_TO_D = FROM J_CLK TO D_CLK TIG ;
-TIMESPEC TS_D_TO_J = FROM D_CLK TO J_CLK TIG ;