Removed copy of FPGA source files.

Original-commit: fd3e84941de463fa1a7ebab0a69515b4bf2614cd
2014-10-07 11:25:20 +02:00
parent 56e84828fe
commit 74893643ca
2415 changed files with 0 additions and 1492030 deletions
@@ -1,12 +0,0 @@
-#
-# Copyright 2013 Ettus Research LLC
-#
-
-##################################################
-# Timing Sources
-##################################################
-TIMING_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/timing/, \
-time_compare.v \
-timekeeper.v \
-pps.v\
-))