Removed copy of FPGA source files.
Original-commit: fd3e84941de463fa1a7ebab0a69515b4bf2614cd
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@@ -1,21 +0,0 @@
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#
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# Copyright 2012-2013 Ettus Research LLC
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#
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##################################################
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# FIFO Sources
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##################################################
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FIFO_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/fifo/, \
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axi_mux4.v \
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axi_mux8.v \
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axi_demux4.v \
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axi_demux8.v \
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axi_fifo_short.v \
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axi_packet_gate.v \
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axi_fifo.v \
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axi_fifo64_to_fifo32.v \
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axi_fifo32_to_fifo64.v \
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axi_fifo_2clk.v \
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axi_loopback.v \
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axi_filter_mux4.v \
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))
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