rfnoc: Fix noc_shell direction comments
Some comments describing data flow direction were wrong. This commit updates the Mako files and updates the noc_shell modules with newly generated versions. Original-commit: 270a7e13c365d05ba04ab44a2f844d96ba15f43b
This commit is contained in:
@@ -1,5 +1,5 @@
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//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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@@ -25,7 +25,6 @@ module noc_shell_addsub #(
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parameter CHDR_W = 64,
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parameter [5:0] MTU = 10,
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parameter USE_IMPL = "Verilog"
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) (
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//---------------------
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// Framework Interface
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_axi_ram_fifo
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the axi_ram_fifo block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -212,7 +212,7 @@ module noc_shell_axi_ram_fifo #(
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assign axis_chdr_clk = rfnoc_chdr_clk;
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assign axis_chdr_rst = rfnoc_chdr_rst;
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//---------------------
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// Input Data Paths
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//---------------------
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_ddc
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the ddc block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -99,7 +99,7 @@ module noc_shell_ddc #(
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output wire [NUM_PORTS*16-1:0] m_in_axis_tlength,
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output wire [NUM_PORTS-1:0] m_in_axis_teov,
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output wire [NUM_PORTS-1:0] m_in_axis_teob,
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// Data Stream to User Logic: out
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// Data Stream from User Logic: out
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input wire [NUM_PORTS*32*1-1:0] s_out_axis_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_axis_tkeep,
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input wire [NUM_PORTS-1:0] s_out_axis_tlast,
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@@ -222,7 +222,7 @@ module noc_shell_ddc #(
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assign axis_data_clk = ce_clk;
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assign axis_data_rst = ce_rst;
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//---------------------
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// Input Data Paths
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//---------------------
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@@ -251,7 +251,7 @@ module noc_shell_ddc #(
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.m_axis_tready (m_in_axis_tready[i]),
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.m_axis_ttimestamp (m_in_axis_ttimestamp[64*i+:64]),
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.m_axis_thas_time (m_in_axis_thas_time[i]),
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.m_axis_tlength (m_in_axis_tlength[i*16+:16]),
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.m_axis_tlength (m_in_axis_tlength[16*i+:16]),
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.m_axis_teov (m_in_axis_teov[i]),
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.m_axis_teob (m_in_axis_teob[i]),
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.flush_en (data_i_flush_en),
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@@ -267,13 +267,14 @@ module noc_shell_ddc #(
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for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_output_out
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axis_data_to_chdr #(
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.CHDR_W (CHDR_W),
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.ITEM_W (32),
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.NIPC (1),
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.SYNC_CLKS (0),
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.INFO_FIFO_SIZE ($clog2(32)),
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.PYLD_FIFO_SIZE ($clog2(MTU)),
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.MTU (MTU)
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.CHDR_W (CHDR_W),
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.ITEM_W (32),
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.NIPC (1),
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.SYNC_CLKS (0),
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.INFO_FIFO_SIZE ($clog2(32)),
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.PYLD_FIFO_SIZE ($clog2(MTU)),
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.MTU (MTU),
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.SIDEBAND_AT_END (1)
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) axis_data_to_chdr_out_out (
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.axis_chdr_clk (rfnoc_chdr_clk),
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.axis_chdr_rst (rfnoc_chdr_rst),
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@@ -290,6 +291,7 @@ module noc_shell_ddc #(
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.s_axis_tready (s_out_axis_tready[i]),
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.s_axis_ttimestamp (s_out_axis_ttimestamp[64*i+:64]),
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.s_axis_thas_time (s_out_axis_thas_time[i]),
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.s_axis_tlength (16'd0),
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.s_axis_teov (s_out_axis_teov[i]),
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.s_axis_teob (s_out_axis_teob[i]),
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.flush_en (data_o_flush_en),
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_duc
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the duc block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -99,7 +99,7 @@ module noc_shell_duc #(
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output wire [NUM_PORTS*16-1:0] m_in_axis_tlength,
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output wire [NUM_PORTS-1:0] m_in_axis_teov,
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output wire [NUM_PORTS-1:0] m_in_axis_teob,
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// Data Stream to User Logic: out
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// Data Stream from User Logic: out
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input wire [NUM_PORTS*32*1-1:0] s_out_axis_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_axis_tkeep,
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input wire [NUM_PORTS-1:0] s_out_axis_tlast,
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@@ -222,7 +222,7 @@ module noc_shell_duc #(
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assign axis_data_clk = ce_clk;
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assign axis_data_rst = ce_rst;
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//---------------------
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// Input Data Paths
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//---------------------
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@@ -251,7 +251,7 @@ module noc_shell_duc #(
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.m_axis_tready (m_in_axis_tready[i]),
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.m_axis_ttimestamp (m_in_axis_ttimestamp[64*i+:64]),
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.m_axis_thas_time (m_in_axis_thas_time[i]),
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.m_axis_tlength (m_in_axis_tlength[i*16+:16]),
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.m_axis_tlength (m_in_axis_tlength[16*i+:16]),
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.m_axis_teov (m_in_axis_teov[i]),
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.m_axis_teob (m_in_axis_teob[i]),
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.flush_en (data_i_flush_en),
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@@ -267,13 +267,14 @@ module noc_shell_duc #(
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for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_output_out
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axis_data_to_chdr #(
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.CHDR_W (CHDR_W),
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.ITEM_W (32),
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.NIPC (1),
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.SYNC_CLKS (0),
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.INFO_FIFO_SIZE ($clog2(32)),
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.PYLD_FIFO_SIZE ($clog2(MTU)),
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.MTU (MTU)
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.CHDR_W (CHDR_W),
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.ITEM_W (32),
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.NIPC (1),
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.SYNC_CLKS (0),
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.INFO_FIFO_SIZE ($clog2(32)),
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.PYLD_FIFO_SIZE ($clog2(MTU)),
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.MTU (MTU),
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.SIDEBAND_AT_END (1)
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) axis_data_to_chdr_out_out (
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.axis_chdr_clk (rfnoc_chdr_clk),
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.axis_chdr_rst (rfnoc_chdr_rst),
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@@ -290,6 +291,7 @@ module noc_shell_duc #(
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.s_axis_tready (s_out_axis_tready[i]),
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.s_axis_ttimestamp (s_out_axis_ttimestamp[64*i+:64]),
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.s_axis_thas_time (s_out_axis_thas_time[i]),
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.s_axis_tlength (16'd0),
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.s_axis_teov (s_out_axis_teov[i]),
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.s_axis_teob (s_out_axis_teob[i]),
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.flush_en (data_o_flush_en),
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_fft
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the fft block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_fir_filter
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the fir_filter block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -103,13 +103,13 @@ module noc_shell_fir_filter #(
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output wire [NUM_PORTS-1:0] m_in_context_tlast,
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output wire [NUM_PORTS-1:0] m_in_context_tvalid,
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input wire [NUM_PORTS-1:0] m_in_context_tready,
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// Payload Stream to User Logic: out
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// Payload Stream from User Logic: out
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input wire [NUM_PORTS*32*1-1:0] s_out_payload_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_payload_tkeep,
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input wire [NUM_PORTS-1:0] s_out_payload_tlast,
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input wire [NUM_PORTS-1:0] s_out_payload_tvalid,
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output wire [NUM_PORTS-1:0] s_out_payload_tready,
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// Context Stream to User Logic: out
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// Context Stream from User Logic: out
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input wire [NUM_PORTS*CHDR_W-1:0] s_out_context_tdata,
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input wire [NUM_PORTS*4-1:0] s_out_context_tuser,
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input wire [NUM_PORTS-1:0] s_out_context_tlast,
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@@ -1,11 +1,11 @@
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//
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// Copyright 2020 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_fosphor
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the fosphor block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -229,7 +229,7 @@ module noc_shell_fosphor #(
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assign axis_data_clk = ce_clk;
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assign axis_data_rst = ce_rst;
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//---------------------
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// Input Data Paths
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//---------------------
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@@ -1,5 +1,5 @@
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//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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@@ -23,8 +23,8 @@
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module noc_shell_keep_one_in_n #(
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parameter [9:0] THIS_PORTID = 10'd0,
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parameter CHDR_W = 64,
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parameter NUM_PORTS = 1,
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parameter [5:0] MTU = 10
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parameter [5:0] MTU = 10,
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parameter NUM_PORTS = 1
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) (
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//---------------------
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// Framework Interface
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@@ -95,7 +95,7 @@ module noc_shell_keep_one_in_n #(
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output wire [NUM_PORTS*16-1:0] m_in_axis_tlength,
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output wire [NUM_PORTS-1:0] m_in_axis_teov,
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output wire [NUM_PORTS-1:0] m_in_axis_teob,
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// Data Stream to User Logic: out
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// Data Stream from User Logic: out
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input wire [NUM_PORTS*32*1-1:0] s_out_axis_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_axis_tkeep,
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input wire [NUM_PORTS-1:0] s_out_axis_tlast,
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@@ -1,5 +1,5 @@
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//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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@@ -85,13 +85,13 @@ module noc_shell_logpwr #(
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output wire [NUM_PORTS-1:0] m_in_context_tlast,
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output wire [NUM_PORTS-1:0] m_in_context_tvalid,
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input wire [NUM_PORTS-1:0] m_in_context_tready,
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// Payload Stream to User Logic: out
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// Payload Stream from User Logic: out
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input wire [NUM_PORTS*16*1-1:0] s_out_payload_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_payload_tkeep,
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input wire [NUM_PORTS-1:0] s_out_payload_tlast,
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input wire [NUM_PORTS-1:0] s_out_payload_tvalid,
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output wire [NUM_PORTS-1:0] s_out_payload_tready,
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// Context Stream to User Logic: out
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// Context Stream from User Logic: out
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input wire [NUM_PORTS*CHDR_W-1:0] s_out_context_tdata,
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input wire [NUM_PORTS*4-1:0] s_out_context_tuser,
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input wire [NUM_PORTS-1:0] s_out_context_tlast,
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@@ -1,5 +1,5 @@
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//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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@@ -96,13 +96,13 @@ module noc_shell_moving_avg #(
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output wire [NUM_PORTS-1:0] m_in_context_tlast,
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output wire [NUM_PORTS-1:0] m_in_context_tvalid,
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input wire [NUM_PORTS-1:0] m_in_context_tready,
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// Payload Stream to User Logic: out
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// Payload Stream from User Logic: out
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input wire [NUM_PORTS*32*1-1:0] s_out_payload_tdata,
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input wire [NUM_PORTS*1-1:0] s_out_payload_tkeep,
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input wire [NUM_PORTS-1:0] s_out_payload_tlast,
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input wire [NUM_PORTS-1:0] s_out_payload_tvalid,
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output wire [NUM_PORTS-1:0] s_out_payload_tready,
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// Context Stream to User Logic: out
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// Context Stream from User Logic: out
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input wire [NUM_PORTS*CHDR_W-1:0] s_out_context_tdata,
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input wire [NUM_PORTS*4-1:0] s_out_context_tuser,
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input wire [NUM_PORTS-1:0] s_out_context_tlast,
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
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// Copyright 2021 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_null_src_sink
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the null_src_sink block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -23,9 +23,9 @@
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module noc_shell_null_src_sink #(
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parameter [9:0] THIS_PORTID = 10'd0,
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parameter CHDR_W = 64,
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parameter ITEM_W = 32,
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parameter NIPC = 2,
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parameter [5:0] MTU = 10
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parameter [5:0] MTU = 10,
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parameter NIPC = CHDR_W/32,
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parameter ITEM_W = 32
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) (
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//---------------------
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// Framework Interface
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@@ -1,11 +1,11 @@
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//
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// Copyright 2019 Ettus Research, A National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
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||||
//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: noc_shell_radio
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//
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// Description:
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// Description:
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//
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// This is a tool-generated NoC-shell for the radio block.
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// See the RFNoC specification for more information about NoC shells.
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@@ -115,7 +115,7 @@ module noc_shell_radio #(
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output wire [NUM_PORTS*16-1:0] m_in_axis_tlength,
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output wire [NUM_PORTS-1:0] m_in_axis_teov,
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output wire [NUM_PORTS-1:0] m_in_axis_teob,
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// Data Stream to User Logic: out
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// Data Stream from User Logic: out
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input wire [NUM_PORTS*ITEM_W*NIPC-1:0] s_out_axis_tdata,
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input wire [NUM_PORTS*NIPC-1:0] s_out_axis_tkeep,
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input wire [NUM_PORTS-1:0] s_out_axis_tlast,
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@@ -238,7 +238,7 @@ module noc_shell_radio #(
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assign axis_data_clk = radio_clk;
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assign axis_data_rst = radio_rst;
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//---------------------
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// Input Data Paths
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//---------------------
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@@ -267,7 +267,7 @@ module noc_shell_radio #(
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.m_axis_tready (m_in_axis_tready[i]),
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.m_axis_ttimestamp (m_in_axis_ttimestamp[64*i+:64]),
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.m_axis_thas_time (m_in_axis_thas_time[i]),
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.m_axis_tlength (m_in_axis_tlength[i*16+:16]),
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.m_axis_tlength (m_in_axis_tlength[16*i+:16]),
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.m_axis_teov (m_in_axis_teov[i]),
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.m_axis_teob (m_in_axis_teob[i]),
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.flush_en (data_i_flush_en),
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@@ -283,13 +283,14 @@ module noc_shell_radio #(
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|
||||
for (i = 0; i < NUM_PORTS; i = i + 1) begin: gen_output_out
|
||||
axis_data_to_chdr #(
|
||||
.CHDR_W (CHDR_W),
|
||||
.ITEM_W (ITEM_W),
|
||||
.NIPC (NIPC),
|
||||
.SYNC_CLKS (0),
|
||||
.INFO_FIFO_SIZE ($clog2(32)),
|
||||
.PYLD_FIFO_SIZE ($clog2(MTU)),
|
||||
.MTU (MTU)
|
||||
.CHDR_W (CHDR_W),
|
||||
.ITEM_W (ITEM_W),
|
||||
.NIPC (NIPC),
|
||||
.SYNC_CLKS (0),
|
||||
.INFO_FIFO_SIZE ($clog2(32)),
|
||||
.PYLD_FIFO_SIZE ($clog2(MTU)),
|
||||
.MTU (MTU),
|
||||
.SIDEBAND_AT_END (1)
|
||||
) axis_data_to_chdr_out_out (
|
||||
.axis_chdr_clk (rfnoc_chdr_clk),
|
||||
.axis_chdr_rst (rfnoc_chdr_rst),
|
||||
@@ -306,6 +307,7 @@ module noc_shell_radio #(
|
||||
.s_axis_tready (s_out_axis_tready[i]),
|
||||
.s_axis_ttimestamp (s_out_axis_ttimestamp[64*i+:64]),
|
||||
.s_axis_thas_time (s_out_axis_thas_time[i]),
|
||||
.s_axis_tlength (16'd0),
|
||||
.s_axis_teov (s_out_axis_teov[i]),
|
||||
.s_axis_teob (s_out_axis_teob[i]),
|
||||
.flush_en (data_o_flush_en),
|
||||
|
||||
@@ -1,11 +1,11 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: noc_shell_replay
|
||||
//
|
||||
// Description:
|
||||
// Description:
|
||||
//
|
||||
// This is a tool-generated NoC-shell for the replay block.
|
||||
// See the RFNoC specification for more information about NoC shells.
|
||||
@@ -97,7 +97,7 @@ module noc_shell_replay #(
|
||||
output wire [NUM_PORTS*16-1:0] m_in_axis_tlength,
|
||||
output wire [NUM_PORTS-1:0] m_in_axis_teov,
|
||||
output wire [NUM_PORTS-1:0] m_in_axis_teob,
|
||||
// Data Stream to User Logic: out
|
||||
// Data Stream from User Logic: out
|
||||
input wire [NUM_PORTS*32*MEM_DATA_W/32-1:0] s_out_axis_tdata,
|
||||
input wire [NUM_PORTS*MEM_DATA_W/32-1:0] s_out_axis_tkeep,
|
||||
input wire [NUM_PORTS-1:0] s_out_axis_tlast,
|
||||
@@ -221,7 +221,7 @@ module noc_shell_replay #(
|
||||
|
||||
assign axis_data_clk = mem_clk;
|
||||
assign axis_data_rst = mem_rst;
|
||||
|
||||
|
||||
//---------------------
|
||||
// Input Data Paths
|
||||
//---------------------
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
@@ -84,7 +84,7 @@ module noc_shell_siggen #(
|
||||
// AXI-Stream Data Clock and Reset
|
||||
output wire axis_data_clk,
|
||||
output wire axis_data_rst,
|
||||
// Data Stream to User Logic: out
|
||||
// Data Stream from User Logic: out
|
||||
input wire [NUM_PORTS*32*1-1:0] s_out_axis_tdata,
|
||||
input wire [NUM_PORTS*1-1:0] s_out_axis_tkeep,
|
||||
input wire [NUM_PORTS-1:0] s_out_axis_tlast,
|
||||
|
||||
@@ -1,11 +1,11 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: noc_shell_split_stream
|
||||
//
|
||||
// Description:
|
||||
// Description:
|
||||
//
|
||||
// This is a tool-generated NoC-shell for the split_stream block.
|
||||
// See the RFNoC specification for more information about NoC shells.
|
||||
@@ -138,7 +138,7 @@ module noc_shell_split_stream #(
|
||||
|
||||
assign axis_chdr_clk = rfnoc_chdr_clk;
|
||||
assign axis_chdr_rst = rfnoc_chdr_rst;
|
||||
|
||||
|
||||
//---------------------
|
||||
// Input Data Paths
|
||||
//---------------------
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
@@ -96,13 +96,13 @@ module noc_shell_vector_iir #(
|
||||
output wire [NUM_PORTS-1:0] m_in_context_tlast,
|
||||
output wire [NUM_PORTS-1:0] m_in_context_tvalid,
|
||||
input wire [NUM_PORTS-1:0] m_in_context_tready,
|
||||
// Payload Stream to User Logic: out
|
||||
// Payload Stream from User Logic: out
|
||||
input wire [NUM_PORTS*32*1-1:0] s_out_payload_tdata,
|
||||
input wire [NUM_PORTS*1-1:0] s_out_payload_tkeep,
|
||||
input wire [NUM_PORTS-1:0] s_out_payload_tlast,
|
||||
input wire [NUM_PORTS-1:0] s_out_payload_tvalid,
|
||||
output wire [NUM_PORTS-1:0] s_out_payload_tready,
|
||||
// Context Stream to User Logic: out
|
||||
// Context Stream from User Logic: out
|
||||
input wire [NUM_PORTS*CHDR_W-1:0] s_out_context_tdata,
|
||||
input wire [NUM_PORTS*4-1:0] s_out_context_tuser,
|
||||
input wire [NUM_PORTS-1:0] s_out_context_tlast,
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
//
|
||||
// Copyright 2020 Ettus Research, a National Instruments Brand
|
||||
// Copyright 2021 Ettus Research, a National Instruments Brand
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
@@ -97,13 +97,13 @@ module noc_shell_window #(
|
||||
output wire [NUM_PORTS-1:0] m_in_context_tlast,
|
||||
output wire [NUM_PORTS-1:0] m_in_context_tvalid,
|
||||
input wire [NUM_PORTS-1:0] m_in_context_tready,
|
||||
// Payload Stream to User Logic: out
|
||||
// Payload Stream from User Logic: out
|
||||
input wire [NUM_PORTS*32*1-1:0] s_out_payload_tdata,
|
||||
input wire [NUM_PORTS*1-1:0] s_out_payload_tkeep,
|
||||
input wire [NUM_PORTS-1:0] s_out_payload_tlast,
|
||||
input wire [NUM_PORTS-1:0] s_out_payload_tvalid,
|
||||
output wire [NUM_PORTS-1:0] s_out_payload_tready,
|
||||
// Context Stream to User Logic: out
|
||||
// Context Stream from User Logic: out
|
||||
input wire [NUM_PORTS*CHDR_W-1:0] s_out_context_tdata,
|
||||
input wire [NUM_PORTS*4-1:0] s_out_context_tuser,
|
||||
input wire [NUM_PORTS-1:0] s_out_context_tlast,
|
||||
|
||||
Reference in New Issue
Block a user