fpga: Align build process for all targets
- All RFNoC capable targets now require rfnoc_image_builder to be built - `make help` is updated for all targets to provide more useful and up-to-date information - The FPGA manual is also updated - All checked-in build artifacts are now removed from git - axi_ram_fifo.yml is updated to provide include path information (required for building N3xx BIST images, which use this) Original-commit: 28b994406d4c9547b1e2add62781b6a8162fdb74
This commit is contained in:
Martin Braun
committed by
Joerg Hofrichter
Joerg Hofrichter
parent
ba5e431c5c
commit
6ef3795e42
+69
-34
@@ -8,7 +8,15 @@
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##USRP N3XX FPGA Help
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##-------------------
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##Usage:
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## make <Targets> <Options>
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## rfnoc_image_builder -y <image core file> -t <target>
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##
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## NOTE: For building N3x0 bitfiles, do not run make directly! Instead, use
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## rfnoc_image_builder. It will create all intermediate files, set up a Vivado
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## environment, and run Vivado to build a bitfile.
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##
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## There exist some special make targets which can be called directly like this:
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##
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## make <Targets> <Options>
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##
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##Output:
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## $(BUILD_OUTPUT_DIR)/usrp_<product>_fpga_<image_type>.bit: Configuration bitstream with header
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@@ -75,9 +83,9 @@ ifeq ($(TARGET),bin)
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post_build = @\
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mkdir -p $(BUILD_OUTPUT_DIR); \
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echo "Exporting bitstream file..."; \
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cp $(BUILD_BASE_DIR)/build-$(1)_$(2)/n3xx.bit $(BUILD_OUTPUT_DIR)/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).bit; \
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cp $(BUILD_DIR)/n3xx.bit $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).bit; \
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echo "Exporting build report..."; \
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cp $(BUILD_BASE_DIR)/build-$(1)_$(2)/build.rpt $(BUILD_OUTPUT_DIR)/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).rpt; \
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cp $(BUILD_DIR)/build.rpt $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).rpt; \
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echo "Build DONE ... $(1)_$(2)";
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else
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post_build = @echo "Skipping bitfile export."
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@@ -86,106 +94,120 @@ endif
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##
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##Supported Targets
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##-----------------
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##
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##Reminder: Targets are built by calling
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##
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## $ rfnoc_image_builder -y <image core file.yml> -t <target>
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##
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##The default image core file is called e320_rfnoc_image_core.yml.
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##Of course, a custom YAML file may be used.
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##
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##Example:
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## $ rfnoc_image_builder -y n310_rfnoc_image_core.yml -t N310_XG
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##will build the N310_XG target (10-Gigabit Ethernet on both SFP+ ports).
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##
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##UHD provides a default image core YAML file for every device type called
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##n300_rfnoc_image_core.yml, n310_rfnoc_image_core.yml, and n320_rfnoc_image_core.yml,
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##respectively.
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##For the '-t' argument, combine of the following targets with an appropriate
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##image core file:
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##
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all: N300_HG N300_XG N310_HG N310_XG N320_HG N320_XG ##(Default target)
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##N300_IP: Build IP for N300 only.
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N300_IP:
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+$(call vivado_ip,N300,$(HG_DEFS) N300=1,$(N300_DEFAULTS))
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##N310_IP: Build IP for N310/N320.
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##N320_IP: Build IP for N310/N320.
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N310_IP N320_IP: N3X0_IP
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N3X0_IP:
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+$(call vivado_ip,N310,$(HG_DEFS) N310=1,$(N310_DEFAULTS))
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check-variables:
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ifndef IMAGE_CORE_NAME
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$(error IMAGE_CORE_NAME is not set! Use rfnoc_image_builder to create valid make commands)
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endif
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ifndef BUILD_DIR
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$(error BUILD_DIR is not set! Use rfnoc_image_builder to create valid make commands)
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endif
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##N310_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_WX: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_WX.dts
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N310_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_WX.dts
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$(call vivado_build,N310,$(WX_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,WX)
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##N310_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_HG: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HG.dts
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N310_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HG.dts
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$(call vivado_build,N310,$(HG_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,HG)
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##N310_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_XG: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XG.dts
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N310_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XG.dts
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$(call vivado_build,N310,$(XG_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,XG)
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##N310_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N310_HA: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HA.dts
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N310_HA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HA.dts
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$(call vivado_build,N310,$(HA_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,HA)
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##N310_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N310_XA: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XA.dts
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N310_XA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XA.dts
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$(call vivado_build,N310,$(XA_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,XA)
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##N310_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N310_AA: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_AA.dts
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N310_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_AA.dts
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$(call vivado_build,N310,$(AA_DEFS) N310=1,$(N310AA_DEFAULTS))
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$(call post_build,N310,AA)
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##N300_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_WX: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_WX.dts
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N300_WX: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_WX.dts
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$(call vivado_build,N300,$(WX_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,WX)
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##N300_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_HG: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HG.dts
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N300_HG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HG.dts
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$(call vivado_build,N300,$(HG_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,HG)
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##N300_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_XG: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XG.dts
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N300_XG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XG.dts
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$(call vivado_build,N300,$(XG_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,XG)
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##N300_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N300_HA: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HA.dts
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N300_HA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HA.dts
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$(call vivado_build,N300,$(HA_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,HA)
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##N300_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N300_XA: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XA.dts
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N300_XA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XA.dts
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$(call vivado_build,N300,$(XA_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,XA)
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##N300_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N300_AA: N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_AA.dts
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N300_AA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_AA.dts
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$(call vivado_build,N300,$(AA_DEFS) N300=1,$(N300AA_DEFAULTS))
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$(call post_build,N300,AA)
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##N320_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_WX: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_WX.dts
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N320_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_WX.dts
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$(call vivado_build,N320,$(WX_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,WX)
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##N320_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_HG: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_HG.dts
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N320_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_HG.dts
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$(call vivado_build,N320,$(HG_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,HG)
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##N320_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_XG: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XG.dts
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N320_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XG.dts
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$(call vivado_build,N320,$(XG_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,XG)
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##N320_XQ: WR on SFP+ Port0, 10Gig on QSFP+ Port0,1.
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N320_XQ: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XQ.dts
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N320_XQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XQ.dts
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$(call vivado_build,N320,$(XQ_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,XQ)
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##N320_AQ: 10Gig on SFP+ Port0,1 Aurora on QSFP+ Port0,1,2,3.
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N320_AQ: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AQ.dts
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N320_AQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AQ.dts
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$(call vivado_build,N320,$(AQ_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,AQ)
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##N320_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N320_AA: N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AA.dts
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N320_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AA.dts
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$(call vivado_build,N320,$(AA_DEFS) N320=1,$(N320AA_DEFAULTS))
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$(call post_build,N320,AA)
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@@ -193,15 +215,28 @@ $(BUILD_OUTPUT_DIR)/%.dts: dts/%.dts dts/*.dtsi
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-mkdir -p $(BUILD_OUTPUT_DIR)
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${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $<
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##
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##Other Make Targets (these should be called directly)
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##----------------------------------------------------
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##N310_IP: Build IP for N310/N320. Use the -j option to build multiple IP blocks simultaneously.
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##N320_IP: Build IP for N310/N320. Use the -j option to build multiple IP blocks simultaneously.
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N310_IP N320_IP: N3X0_IP
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N3X0_IP:
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+$(call vivado_ip,N310,$(HG_DEFS) N310=1,$(N310_DEFAULTS))
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##N300_IP: Build IP for N300 only. Use the -j option to build multiple IP blocks simultaneously.
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N300_IP:
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+$(call vivado_ip,N300,$(HG_DEFS) N300=1,$(N300_DEFAULTS))
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clean: ##Clean up all target build outputs.
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@echo "Cleaning targets..."
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@rm -rf $(BUILD_BASE_DIR)/build-N3*_*
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@rm -rf $(BUILD_BASE_DIR)/build-N3*_* $(BUILD_BASE_DIR)/build-usrp* $(BUILD_DIR)
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@rm -rf $(BUILD_OUTPUT_DIR)
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cleanall: ##Clean up all target and ip build outputs.
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@echo "Cleaning targets and IP..."
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@rm -rf build-ip
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@rm -rf $(BUILD_BASE_DIR)/build-N3*_*
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@rm -rf $(BUILD_BASE_DIR)/build-* $(BUILD_DIR)
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@rm -rf $(BUILD_OUTPUT_DIR)
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help: ##Show this help message.
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