fpga: Align build process for all targets

- All RFNoC capable targets now require rfnoc_image_builder to be built
- `make help` is updated for all targets to provide more useful and
  up-to-date information
- The FPGA manual is also updated
- All checked-in build artifacts are now removed from git
- axi_ram_fifo.yml is updated to provide include path information
  (required for building N3xx BIST images, which use this)


Original-commit: 28b994406d4c9547b1e2add62781b6a8162fdb74

tools/make/viv_design_builder.mak

@@ -20,6 +20,8 @@ SIMULATION = 0
 # -------------------------------------------------------------------
 BUILD_VIVADO_DESIGN = \
 	@ \
+	$(if $(BUILD_DIR),,$(error "BUILD_DIR" is not defined! Use rfnoc_image_builder to create valid commands)) \
+	$(if $(IMAGE_CORE_NAME),,$(error "IMAGE_CORE_NAME" is not defined! Use rfnoc_image_builder to create valid commands)) \
 	export VIV_TOOLS_DIR=$(call RESOLVE_PATH,$(TOOLS_DIR)); \
 	export VIV_OUTPUT_DIR=$(call RESOLVE_PATH,$(BUILD_DIR)); \
 	export VIV_TOP_MODULE=$(2); \

tools/make/viv_preamble.mak

@@ -32,17 +32,6 @@ MAKEFILE_DIR = $(abspath .)
 IP_BUILD_DIR ?= $(abspath ./build-ip/$(subst /,,$(PART_ID)))
 BUILD_BASE_DIR ?= $(abspath .)
 
-ifdef ARTIFACT_DIR
-BUILD_DIR = $(abspath $(ARTIFACT_DIR))
-else
-ifdef NAME
-BUILD_DIR = $(abspath $(BUILD_BASE_DIR)/build-$(NAME))
-else
-BUILD_DIR = $(abspath $(BUILD_BASE_DIR)/build)
-endif
-endif
-
-
 # -------------------------------------------------------------------
 # Git Hash Retrieval
 # -------------------------------------------------------------------
@@ -80,7 +69,9 @@ endif
 # Intermediate build dirs 
 # -------------------------------------------------------------------
 .build_dirs:
+ifdef BUILD_DIR
 	@mkdir -p $(BUILD_DIR)
+endif
 	@mkdir -p $(IP_BUILD_DIR)
 
 .prereqs: .check_tool .build_dirs