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fpga: x400: Add netlist make flow

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Original-commit: 789fa8f65727afabdeb4eea30a941015c6cd2ad5
This commit is contained in:
Javier Valenzuela
2024-06-11 10:20:07 +02:00
committed by Joerg Hofrichter
parent 69e728dba0
commit 6d89320721
5 changed files with 138 additions and 9 deletions
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tools/scripts/viv_secure_synth.tcl
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#
# Copyright 2024 Ettus Research, a National Instruments Brand
#
source $::env(VIV_TOOLS_DIR)/scripts/viv_utils.tcl
source $::env(VIV_TOOLS_DIR)/scripts/viv_strategies.tcl
# STEP#1: Create project, add sources, refresh IP
vivado_utils::initialize_project
# STEP#2: Run synthesis
vivado_utils::synthesize_design -mode out_of_context
vivado_utils::generate_post_synth_reports
# STEP#3: Generate encrypted netlist
vivado_utils::export_encrypted_netlist
# Cleanup
vivado_utils::close_batch_project