fpga: Update x3xx/e3xx RFNoC image core files
Original-commit: d4412b0022f07f94ccbb3b314ac7b81de1a479b8
This commit is contained in:
Javier Valenzuela
committed by
Wade Fife
Wade Fife
parent
a8937b3500
commit
629266db08
@@ -52,58 +52,58 @@ module rfnoc_image_core #(
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// time
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// time
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input wire [ 63:0] radio_time,
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input wire [ 63:0] radio_time,
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// radio
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// radio
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input wire [ 255:0] radio_rx_data,
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input wire [1023:0] radio_rx_data,
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input wire [ 7:0] radio_rx_stb,
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input wire [ 31:0] radio_rx_stb,
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output wire [ 7:0] radio_rx_running,
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output wire [ 31:0] radio_rx_running,
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output wire [ 255:0] radio_tx_data,
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output wire [1023:0] radio_tx_data,
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input wire [ 7:0] radio_tx_stb,
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input wire [ 31:0] radio_tx_stb,
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output wire [ 7:0] radio_tx_running,
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output wire [ 31:0] radio_tx_running,
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// dram
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// dram
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input wire [ 0:0] axi_rst,
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input wire [ 0:0] axi_rst,
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output wire [ 3:0] m_axi_awid,
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output wire [ 7:0] m_axi_awid,
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output wire [ 191:0] m_axi_awaddr,
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output wire [ 383:0] m_axi_awaddr,
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output wire [ 31:0] m_axi_awlen,
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output wire [ 63:0] m_axi_awlen,
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output wire [ 11:0] m_axi_awsize,
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output wire [ 23:0] m_axi_awsize,
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output wire [ 7:0] m_axi_awburst,
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output wire [ 15:0] m_axi_awburst,
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output wire [ 3:0] m_axi_awlock,
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output wire [ 7:0] m_axi_awlock,
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output wire [ 15:0] m_axi_awcache,
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output wire [ 31:0] m_axi_awcache,
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output wire [ 11:0] m_axi_awprot,
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output wire [ 23:0] m_axi_awprot,
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output wire [ 15:0] m_axi_awqos,
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output wire [ 31:0] m_axi_awqos,
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output wire [ 15:0] m_axi_awregion,
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output wire [ 31:0] m_axi_awregion,
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output wire [ 3:0] m_axi_awuser,
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output wire [ 7:0] m_axi_awuser,
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output wire [ 3:0] m_axi_awvalid,
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output wire [ 7:0] m_axi_awvalid,
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input wire [ 3:0] m_axi_awready,
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input wire [ 7:0] m_axi_awready,
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output wire [2047:0] m_axi_wdata,
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output wire [4191:0] m_axi_wdata,
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output wire [ 255:0] m_axi_wstrb,
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output wire [ 511:0] m_axi_wstrb,
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output wire [ 3:0] m_axi_wlast,
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output wire [ 7:0] m_axi_wlast,
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output wire [ 3:0] m_axi_wuser,
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output wire [ 7:0] m_axi_wuser,
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output wire [ 3:0] m_axi_wvalid,
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output wire [ 7:0] m_axi_wvalid,
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input wire [ 3:0] m_axi_wready,
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input wire [ 7:0] m_axi_wready,
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input wire [ 3:0] m_axi_bid,
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input wire [ 7:0] m_axi_bid,
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input wire [ 7:0] m_axi_bresp,
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input wire [ 15:0] m_axi_bresp,
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input wire [ 3:0] m_axi_buser,
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input wire [ 7:0] m_axi_buser,
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input wire [ 3:0] m_axi_bvalid,
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input wire [ 7:0] m_axi_bvalid,
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output wire [ 3:0] m_axi_bready,
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output wire [ 7:0] m_axi_bready,
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output wire [ 3:0] m_axi_arid,
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output wire [ 7:0] m_axi_arid,
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output wire [ 191:0] m_axi_araddr,
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output wire [ 383:0] m_axi_araddr,
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output wire [ 31:0] m_axi_arlen,
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output wire [ 63:0] m_axi_arlen,
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output wire [ 11:0] m_axi_arsize,
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output wire [ 23:0] m_axi_arsize,
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output wire [ 7:0] m_axi_arburst,
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output wire [ 15:0] m_axi_arburst,
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output wire [ 3:0] m_axi_arlock,
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output wire [ 7:0] m_axi_arlock,
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output wire [ 15:0] m_axi_arcache,
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output wire [ 31:0] m_axi_arcache,
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output wire [ 11:0] m_axi_arprot,
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output wire [ 31:0] m_axi_arprot,
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output wire [ 15:0] m_axi_arqos,
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output wire [ 31:0] m_axi_arqos,
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output wire [ 15:0] m_axi_arregion,
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output wire [ 31:0] m_axi_arregion,
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output wire [ 3:0] m_axi_aruser,
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output wire [ 7:0] m_axi_aruser,
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output wire [ 3:0] m_axi_arvalid,
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output wire [ 7:0] m_axi_arvalid,
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input wire [ 3:0] m_axi_arready,
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input wire [ 7:0] m_axi_arready,
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input wire [ 3:0] m_axi_rid,
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input wire [ 7:0] m_axi_rid,
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input wire [2047:0] m_axi_rdata,
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input wire [4191:0] m_axi_rdata,
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input wire [ 7:0] m_axi_rresp,
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input wire [ 15:0] m_axi_rresp,
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input wire [ 3:0] m_axi_rlast,
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input wire [ 7:0] m_axi_rlast,
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input wire [ 3:0] m_axi_ruser,
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input wire [ 7:0] m_axi_ruser,
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input wire [ 3:0] m_axi_rvalid,
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input wire [ 7:0] m_axi_rvalid,
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output wire [ 3:0] m_axi_rready,
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output wire [ 7:0] m_axi_rready,
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// Transport Adapters ///////////////
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// Transport Adapters ///////////////
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@@ -443,12 +443,12 @@ module rfnoc_image_core #(
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// time
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// time
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wire [ 63:0] radio0_radio_time;
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wire [ 63:0] radio0_radio_time;
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// radio
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// radio
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wire [ 255:0] radio0_radio_rx_data;
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wire [1023:0] radio0_radio_rx_data;
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wire [ 7:0] radio0_radio_rx_stb;
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wire [ 31:0] radio0_radio_rx_stb;
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wire [ 7:0] radio0_radio_rx_running;
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wire [ 31:0] radio0_radio_rx_running;
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wire [ 255:0] radio0_radio_tx_data;
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wire [1023:0] radio0_radio_tx_data;
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wire [ 7:0] radio0_radio_tx_stb;
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wire [ 31:0] radio0_radio_tx_stb;
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wire [ 7:0] radio0_radio_tx_running;
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wire [ 31:0] radio0_radio_tx_running;
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rfnoc_block_radio #(
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rfnoc_block_radio #(
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.THIS_PORTID (2),
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.THIS_PORTID (2),
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+100
-100
@@ -53,58 +53,58 @@ module rfnoc_image_core #(
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// time
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// time
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input wire [ 63:0] radio_time,
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input wire [ 63:0] radio_time,
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// radio
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// radio
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input wire [ 255:0] radio_rx_data,
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input wire [1023:0] radio_rx_data,
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input wire [ 7:0] radio_rx_stb,
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input wire [ 31:0] radio_rx_stb,
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output wire [ 7:0] radio_rx_running,
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output wire [ 31:0] radio_rx_running,
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output wire [ 255:0] radio_tx_data,
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output wire [1023:0] radio_tx_data,
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input wire [ 7:0] radio_tx_stb,
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input wire [ 31:0] radio_tx_stb,
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output wire [ 7:0] radio_tx_running,
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output wire [ 31:0] radio_tx_running,
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// dram
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// dram
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input wire [ 0:0] axi_rst,
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input wire [ 0:0] axi_rst,
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output wire [ 3:0] m_axi_awid,
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output wire [ 7:0] m_axi_awid,
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output wire [ 191:0] m_axi_awaddr,
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output wire [ 383:0] m_axi_awaddr,
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output wire [ 31:0] m_axi_awlen,
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output wire [ 63:0] m_axi_awlen,
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output wire [ 11:0] m_axi_awsize,
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output wire [ 23:0] m_axi_awsize,
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output wire [ 7:0] m_axi_awburst,
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output wire [ 15:0] m_axi_awburst,
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output wire [ 3:0] m_axi_awlock,
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output wire [ 7:0] m_axi_awlock,
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output wire [ 15:0] m_axi_awcache,
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output wire [ 31:0] m_axi_awcache,
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output wire [ 11:0] m_axi_awprot,
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output wire [ 23:0] m_axi_awprot,
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output wire [ 15:0] m_axi_awqos,
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output wire [ 31:0] m_axi_awqos,
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output wire [ 15:0] m_axi_awregion,
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output wire [ 31:0] m_axi_awregion,
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output wire [ 3:0] m_axi_awuser,
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output wire [ 7:0] m_axi_awuser,
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output wire [ 3:0] m_axi_awvalid,
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output wire [ 7:0] m_axi_awvalid,
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input wire [ 3:0] m_axi_awready,
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input wire [ 7:0] m_axi_awready,
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output wire [2047:0] m_axi_wdata,
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output wire [4191:0] m_axi_wdata,
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output wire [ 255:0] m_axi_wstrb,
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output wire [ 511:0] m_axi_wstrb,
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output wire [ 3:0] m_axi_wlast,
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output wire [ 7:0] m_axi_wlast,
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output wire [ 3:0] m_axi_wuser,
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output wire [ 7:0] m_axi_wuser,
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output wire [ 3:0] m_axi_wvalid,
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output wire [ 7:0] m_axi_wvalid,
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input wire [ 3:0] m_axi_wready,
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input wire [ 7:0] m_axi_wready,
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input wire [ 3:0] m_axi_bid,
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input wire [ 7:0] m_axi_bid,
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input wire [ 7:0] m_axi_bresp,
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input wire [ 15:0] m_axi_bresp,
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input wire [ 3:0] m_axi_buser,
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input wire [ 7:0] m_axi_buser,
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input wire [ 3:0] m_axi_bvalid,
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input wire [ 7:0] m_axi_bvalid,
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output wire [ 3:0] m_axi_bready,
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output wire [ 7:0] m_axi_bready,
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output wire [ 3:0] m_axi_arid,
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output wire [ 7:0] m_axi_arid,
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output wire [ 191:0] m_axi_araddr,
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output wire [ 383:0] m_axi_araddr,
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output wire [ 31:0] m_axi_arlen,
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output wire [ 63:0] m_axi_arlen,
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output wire [ 11:0] m_axi_arsize,
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output wire [ 23:0] m_axi_arsize,
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output wire [ 7:0] m_axi_arburst,
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output wire [ 15:0] m_axi_arburst,
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output wire [ 3:0] m_axi_arlock,
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output wire [ 7:0] m_axi_arlock,
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output wire [ 15:0] m_axi_arcache,
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output wire [ 31:0] m_axi_arcache,
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output wire [ 11:0] m_axi_arprot,
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output wire [ 31:0] m_axi_arprot,
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output wire [ 15:0] m_axi_arqos,
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output wire [ 31:0] m_axi_arqos,
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output wire [ 15:0] m_axi_arregion,
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output wire [ 31:0] m_axi_arregion,
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output wire [ 3:0] m_axi_aruser,
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output wire [ 7:0] m_axi_aruser,
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output wire [ 3:0] m_axi_arvalid,
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output wire [ 7:0] m_axi_arvalid,
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input wire [ 3:0] m_axi_arready,
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input wire [ 7:0] m_axi_arready,
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input wire [ 3:0] m_axi_rid,
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input wire [ 7:0] m_axi_rid,
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input wire [2047:0] m_axi_rdata,
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input wire [4191:0] m_axi_rdata,
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input wire [ 7:0] m_axi_rresp,
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input wire [ 15:0] m_axi_rresp,
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input wire [ 3:0] m_axi_rlast,
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input wire [ 7:0] m_axi_rlast,
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input wire [ 3:0] m_axi_ruser,
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input wire [ 7:0] m_axi_ruser,
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input wire [ 3:0] m_axi_rvalid,
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input wire [ 7:0] m_axi_rvalid,
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output wire [ 3:0] m_axi_rready,
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output wire [ 7:0] m_axi_rready,
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// Transport Adapters ///////////////
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// Transport Adapters ///////////////
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@@ -720,12 +720,12 @@ module rfnoc_image_core #(
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// time
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// time
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wire [ 63:0] radio0_radio_time;
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wire [ 63:0] radio0_radio_time;
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// radio
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// radio
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wire [ 255:0] radio0_radio_rx_data;
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wire [1023:0] radio0_radio_rx_data;
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wire [ 7:0] radio0_radio_rx_stb;
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wire [ 31:0] radio0_radio_rx_stb;
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wire [ 7:0] radio0_radio_rx_running;
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wire [ 31:0] radio0_radio_rx_running;
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wire [ 255:0] radio0_radio_tx_data;
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wire [1023:0] radio0_radio_tx_data;
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wire [ 7:0] radio0_radio_tx_stb;
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wire [ 31:0] radio0_radio_tx_stb;
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wire [ 7:0] radio0_radio_tx_running;
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wire [ 31:0] radio0_radio_tx_running;
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rfnoc_block_radio #(
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rfnoc_block_radio #(
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.THIS_PORTID (4),
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.THIS_PORTID (4),
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@@ -791,50 +791,50 @@ module rfnoc_image_core #(
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// axi_ram
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// axi_ram
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wire [ 0:0] fifo0_axi_rst;
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wire [ 0:0] fifo0_axi_rst;
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wire [ 3:0] fifo0_m_axi_awid;
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wire [ 7:0] fifo0_m_axi_awid;
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wire [ 191:0] fifo0_m_axi_awaddr;
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wire [ 383:0] fifo0_m_axi_awaddr;
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wire [ 31:0] fifo0_m_axi_awlen;
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wire [ 63:0] fifo0_m_axi_awlen;
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wire [ 11:0] fifo0_m_axi_awsize;
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wire [ 23:0] fifo0_m_axi_awsize;
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wire [ 7:0] fifo0_m_axi_awburst;
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wire [ 15:0] fifo0_m_axi_awburst;
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wire [ 3:0] fifo0_m_axi_awlock;
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wire [ 7:0] fifo0_m_axi_awlock;
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wire [ 15:0] fifo0_m_axi_awcache;
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wire [ 31:0] fifo0_m_axi_awcache;
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wire [ 11:0] fifo0_m_axi_awprot;
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wire [ 23:0] fifo0_m_axi_awprot;
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wire [ 15:0] fifo0_m_axi_awqos;
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wire [ 31:0] fifo0_m_axi_awqos;
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wire [ 15:0] fifo0_m_axi_awregion;
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wire [ 31:0] fifo0_m_axi_awregion;
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wire [ 3:0] fifo0_m_axi_awuser;
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wire [ 7:0] fifo0_m_axi_awuser;
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wire [ 3:0] fifo0_m_axi_awvalid;
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wire [ 7:0] fifo0_m_axi_awvalid;
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wire [ 3:0] fifo0_m_axi_awready;
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wire [ 7:0] fifo0_m_axi_awready;
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wire [2047:0] fifo0_m_axi_wdata;
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wire [4191:0] fifo0_m_axi_wdata;
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wire [ 255:0] fifo0_m_axi_wstrb;
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wire [ 511:0] fifo0_m_axi_wstrb;
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wire [ 3:0] fifo0_m_axi_wlast;
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wire [ 7:0] fifo0_m_axi_wlast;
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wire [ 3:0] fifo0_m_axi_wuser;
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wire [ 7:0] fifo0_m_axi_wuser;
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wire [ 3:0] fifo0_m_axi_wvalid;
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wire [ 7:0] fifo0_m_axi_wvalid;
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wire [ 3:0] fifo0_m_axi_wready;
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wire [ 7:0] fifo0_m_axi_wready;
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wire [ 3:0] fifo0_m_axi_bid;
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wire [ 7:0] fifo0_m_axi_bid;
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wire [ 7:0] fifo0_m_axi_bresp;
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wire [ 15:0] fifo0_m_axi_bresp;
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wire [ 3:0] fifo0_m_axi_buser;
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wire [ 7:0] fifo0_m_axi_buser;
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wire [ 3:0] fifo0_m_axi_bvalid;
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wire [ 7:0] fifo0_m_axi_bvalid;
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wire [ 3:0] fifo0_m_axi_bready;
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wire [ 7:0] fifo0_m_axi_bready;
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wire [ 3:0] fifo0_m_axi_arid;
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wire [ 7:0] fifo0_m_axi_arid;
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wire [ 191:0] fifo0_m_axi_araddr;
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wire [ 383:0] fifo0_m_axi_araddr;
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wire [ 31:0] fifo0_m_axi_arlen;
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wire [ 63:0] fifo0_m_axi_arlen;
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wire [ 11:0] fifo0_m_axi_arsize;
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wire [ 23:0] fifo0_m_axi_arsize;
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wire [ 7:0] fifo0_m_axi_arburst;
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wire [ 15:0] fifo0_m_axi_arburst;
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wire [ 3:0] fifo0_m_axi_arlock;
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wire [ 7:0] fifo0_m_axi_arlock;
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wire [ 15:0] fifo0_m_axi_arcache;
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wire [ 31:0] fifo0_m_axi_arcache;
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wire [ 11:0] fifo0_m_axi_arprot;
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wire [ 31:0] fifo0_m_axi_arprot;
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wire [ 15:0] fifo0_m_axi_arqos;
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wire [ 31:0] fifo0_m_axi_arqos;
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wire [ 15:0] fifo0_m_axi_arregion;
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wire [ 31:0] fifo0_m_axi_arregion;
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wire [ 3:0] fifo0_m_axi_aruser;
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wire [ 7:0] fifo0_m_axi_aruser;
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wire [ 3:0] fifo0_m_axi_arvalid;
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wire [ 7:0] fifo0_m_axi_arvalid;
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wire [ 3:0] fifo0_m_axi_arready;
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wire [ 7:0] fifo0_m_axi_arready;
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wire [ 3:0] fifo0_m_axi_rid;
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wire [ 7:0] fifo0_m_axi_rid;
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wire [2047:0] fifo0_m_axi_rdata;
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wire [4191:0] fifo0_m_axi_rdata;
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wire [ 7:0] fifo0_m_axi_rresp;
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wire [ 15:0] fifo0_m_axi_rresp;
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wire [ 3:0] fifo0_m_axi_rlast;
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wire [ 7:0] fifo0_m_axi_rlast;
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wire [ 3:0] fifo0_m_axi_ruser;
|
wire [ 7:0] fifo0_m_axi_ruser;
|
||||||
wire [ 3:0] fifo0_m_axi_rvalid;
|
wire [ 7:0] fifo0_m_axi_rvalid;
|
||||||
wire [ 3:0] fifo0_m_axi_rready;
|
wire [ 7:0] fifo0_m_axi_rready;
|
||||||
|
|
||||||
rfnoc_block_axi_ram_fifo #(
|
rfnoc_block_axi_ram_fifo #(
|
||||||
.THIS_PORTID (5),
|
.THIS_PORTID (5),
|
||||||
|
|||||||
+112
-112
@@ -66,65 +66,65 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
input wire [ 63:0] radio_time,
|
input wire [ 63:0] radio_time,
|
||||||
// radio0
|
// radio0
|
||||||
input wire [ 255:0] radio_rx_data_radio0,
|
input wire [1023:0] radio_rx_data_radio0,
|
||||||
input wire [ 7:0] radio_rx_stb_radio0,
|
input wire [ 31:0] radio_rx_stb_radio0,
|
||||||
output wire [ 7:0] radio_rx_running_radio0,
|
output wire [ 31:0] radio_rx_running_radio0,
|
||||||
output wire [ 255:0] radio_tx_data_radio0,
|
output wire [1023:0] radio_tx_data_radio0,
|
||||||
input wire [ 7:0] radio_tx_stb_radio0,
|
input wire [ 31:0] radio_tx_stb_radio0,
|
||||||
output wire [ 7:0] radio_tx_running_radio0,
|
output wire [ 31:0] radio_tx_running_radio0,
|
||||||
// radio1
|
// radio1
|
||||||
input wire [ 255:0] radio_rx_data_radio1,
|
input wire [1023:0] radio_rx_data_radio1,
|
||||||
input wire [ 7:0] radio_rx_stb_radio1,
|
input wire [ 31:0] radio_rx_stb_radio1,
|
||||||
output wire [ 7:0] radio_rx_running_radio1,
|
output wire [ 31:0] radio_rx_running_radio1,
|
||||||
output wire [ 255:0] radio_tx_data_radio1,
|
output wire [1023:0] radio_tx_data_radio1,
|
||||||
input wire [ 7:0] radio_tx_stb_radio1,
|
input wire [ 31:0] radio_tx_stb_radio1,
|
||||||
output wire [ 7:0] radio_tx_running_radio1,
|
output wire [ 31:0] radio_tx_running_radio1,
|
||||||
// dram
|
// dram
|
||||||
input wire [ 0:0] axi_rst,
|
input wire [ 0:0] axi_rst,
|
||||||
output wire [ 3:0] m_axi_awid,
|
output wire [ 7:0] m_axi_awid,
|
||||||
output wire [ 191:0] m_axi_awaddr,
|
output wire [ 383:0] m_axi_awaddr,
|
||||||
output wire [ 31:0] m_axi_awlen,
|
output wire [ 63:0] m_axi_awlen,
|
||||||
output wire [ 11:0] m_axi_awsize,
|
output wire [ 23:0] m_axi_awsize,
|
||||||
output wire [ 7:0] m_axi_awburst,
|
output wire [ 15:0] m_axi_awburst,
|
||||||
output wire [ 3:0] m_axi_awlock,
|
output wire [ 7:0] m_axi_awlock,
|
||||||
output wire [ 15:0] m_axi_awcache,
|
output wire [ 31:0] m_axi_awcache,
|
||||||
output wire [ 11:0] m_axi_awprot,
|
output wire [ 23:0] m_axi_awprot,
|
||||||
output wire [ 15:0] m_axi_awqos,
|
output wire [ 31:0] m_axi_awqos,
|
||||||
output wire [ 15:0] m_axi_awregion,
|
output wire [ 31:0] m_axi_awregion,
|
||||||
output wire [ 3:0] m_axi_awuser,
|
output wire [ 7:0] m_axi_awuser,
|
||||||
output wire [ 3:0] m_axi_awvalid,
|
output wire [ 7:0] m_axi_awvalid,
|
||||||
input wire [ 3:0] m_axi_awready,
|
input wire [ 7:0] m_axi_awready,
|
||||||
output wire [2047:0] m_axi_wdata,
|
output wire [4191:0] m_axi_wdata,
|
||||||
output wire [ 255:0] m_axi_wstrb,
|
output wire [ 511:0] m_axi_wstrb,
|
||||||
output wire [ 3:0] m_axi_wlast,
|
output wire [ 7:0] m_axi_wlast,
|
||||||
output wire [ 3:0] m_axi_wuser,
|
output wire [ 7:0] m_axi_wuser,
|
||||||
output wire [ 3:0] m_axi_wvalid,
|
output wire [ 7:0] m_axi_wvalid,
|
||||||
input wire [ 3:0] m_axi_wready,
|
input wire [ 7:0] m_axi_wready,
|
||||||
input wire [ 3:0] m_axi_bid,
|
input wire [ 7:0] m_axi_bid,
|
||||||
input wire [ 7:0] m_axi_bresp,
|
input wire [ 15:0] m_axi_bresp,
|
||||||
input wire [ 3:0] m_axi_buser,
|
input wire [ 7:0] m_axi_buser,
|
||||||
input wire [ 3:0] m_axi_bvalid,
|
input wire [ 7:0] m_axi_bvalid,
|
||||||
output wire [ 3:0] m_axi_bready,
|
output wire [ 7:0] m_axi_bready,
|
||||||
output wire [ 3:0] m_axi_arid,
|
output wire [ 7:0] m_axi_arid,
|
||||||
output wire [ 191:0] m_axi_araddr,
|
output wire [ 383:0] m_axi_araddr,
|
||||||
output wire [ 31:0] m_axi_arlen,
|
output wire [ 63:0] m_axi_arlen,
|
||||||
output wire [ 11:0] m_axi_arsize,
|
output wire [ 23:0] m_axi_arsize,
|
||||||
output wire [ 7:0] m_axi_arburst,
|
output wire [ 15:0] m_axi_arburst,
|
||||||
output wire [ 3:0] m_axi_arlock,
|
output wire [ 7:0] m_axi_arlock,
|
||||||
output wire [ 15:0] m_axi_arcache,
|
output wire [ 31:0] m_axi_arcache,
|
||||||
output wire [ 11:0] m_axi_arprot,
|
output wire [ 31:0] m_axi_arprot,
|
||||||
output wire [ 15:0] m_axi_arqos,
|
output wire [ 31:0] m_axi_arqos,
|
||||||
output wire [ 15:0] m_axi_arregion,
|
output wire [ 31:0] m_axi_arregion,
|
||||||
output wire [ 3:0] m_axi_aruser,
|
output wire [ 7:0] m_axi_aruser,
|
||||||
output wire [ 3:0] m_axi_arvalid,
|
output wire [ 7:0] m_axi_arvalid,
|
||||||
input wire [ 3:0] m_axi_arready,
|
input wire [ 7:0] m_axi_arready,
|
||||||
input wire [ 3:0] m_axi_rid,
|
input wire [ 7:0] m_axi_rid,
|
||||||
input wire [2047:0] m_axi_rdata,
|
input wire [4191:0] m_axi_rdata,
|
||||||
input wire [ 7:0] m_axi_rresp,
|
input wire [ 15:0] m_axi_rresp,
|
||||||
input wire [ 3:0] m_axi_rlast,
|
input wire [ 7:0] m_axi_rlast,
|
||||||
input wire [ 3:0] m_axi_ruser,
|
input wire [ 7:0] m_axi_ruser,
|
||||||
input wire [ 3:0] m_axi_rvalid,
|
input wire [ 7:0] m_axi_rvalid,
|
||||||
output wire [ 3:0] m_axi_rready,
|
output wire [ 7:0] m_axi_rready,
|
||||||
|
|
||||||
// Transport Adapters ///////////////
|
// Transport Adapters ///////////////
|
||||||
|
|
||||||
@@ -926,12 +926,12 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
wire [ 63:0] radio0_radio_time;
|
wire [ 63:0] radio0_radio_time;
|
||||||
// radio
|
// radio
|
||||||
wire [ 255:0] radio0_radio_rx_data;
|
wire [1023:0] radio0_radio_rx_data;
|
||||||
wire [ 7:0] radio0_radio_rx_stb;
|
wire [ 31:0] radio0_radio_rx_stb;
|
||||||
wire [ 7:0] radio0_radio_rx_running;
|
wire [ 31:0] radio0_radio_rx_running;
|
||||||
wire [ 255:0] radio0_radio_tx_data;
|
wire [1023:0] radio0_radio_tx_data;
|
||||||
wire [ 7:0] radio0_radio_tx_stb;
|
wire [ 31:0] radio0_radio_tx_stb;
|
||||||
wire [ 7:0] radio0_radio_tx_running;
|
wire [ 31:0] radio0_radio_tx_running;
|
||||||
|
|
||||||
rfnoc_block_radio #(
|
rfnoc_block_radio #(
|
||||||
.THIS_PORTID (4),
|
.THIS_PORTID (4),
|
||||||
@@ -1099,12 +1099,12 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
wire [ 63:0] radio1_radio_time;
|
wire [ 63:0] radio1_radio_time;
|
||||||
// radio
|
// radio
|
||||||
wire [ 255:0] radio1_radio_rx_data;
|
wire [1023:0] radio1_radio_rx_data;
|
||||||
wire [ 7:0] radio1_radio_rx_stb;
|
wire [ 31:0] radio1_radio_rx_stb;
|
||||||
wire [ 7:0] radio1_radio_rx_running;
|
wire [ 31:0] radio1_radio_rx_running;
|
||||||
wire [ 255:0] radio1_radio_tx_data;
|
wire [1023:0] radio1_radio_tx_data;
|
||||||
wire [ 7:0] radio1_radio_tx_stb;
|
wire [ 31:0] radio1_radio_tx_stb;
|
||||||
wire [ 7:0] radio1_radio_tx_running;
|
wire [ 31:0] radio1_radio_tx_running;
|
||||||
|
|
||||||
rfnoc_block_radio #(
|
rfnoc_block_radio #(
|
||||||
.THIS_PORTID (7),
|
.THIS_PORTID (7),
|
||||||
@@ -1170,50 +1170,50 @@ module rfnoc_image_core #(
|
|||||||
|
|
||||||
// axi_ram
|
// axi_ram
|
||||||
wire [ 0:0] replay0_axi_rst;
|
wire [ 0:0] replay0_axi_rst;
|
||||||
wire [ 3:0] replay0_m_axi_awid;
|
wire [ 7:0] replay0_m_axi_awid;
|
||||||
wire [ 191:0] replay0_m_axi_awaddr;
|
wire [ 383:0] replay0_m_axi_awaddr;
|
||||||
wire [ 31:0] replay0_m_axi_awlen;
|
wire [ 63:0] replay0_m_axi_awlen;
|
||||||
wire [ 11:0] replay0_m_axi_awsize;
|
wire [ 23:0] replay0_m_axi_awsize;
|
||||||
wire [ 7:0] replay0_m_axi_awburst;
|
wire [ 15:0] replay0_m_axi_awburst;
|
||||||
wire [ 3:0] replay0_m_axi_awlock;
|
wire [ 7:0] replay0_m_axi_awlock;
|
||||||
wire [ 15:0] replay0_m_axi_awcache;
|
wire [ 31:0] replay0_m_axi_awcache;
|
||||||
wire [ 11:0] replay0_m_axi_awprot;
|
wire [ 23:0] replay0_m_axi_awprot;
|
||||||
wire [ 15:0] replay0_m_axi_awqos;
|
wire [ 31:0] replay0_m_axi_awqos;
|
||||||
wire [ 15:0] replay0_m_axi_awregion;
|
wire [ 31:0] replay0_m_axi_awregion;
|
||||||
wire [ 3:0] replay0_m_axi_awuser;
|
wire [ 7:0] replay0_m_axi_awuser;
|
||||||
wire [ 3:0] replay0_m_axi_awvalid;
|
wire [ 7:0] replay0_m_axi_awvalid;
|
||||||
wire [ 3:0] replay0_m_axi_awready;
|
wire [ 7:0] replay0_m_axi_awready;
|
||||||
wire [2047:0] replay0_m_axi_wdata;
|
wire [4191:0] replay0_m_axi_wdata;
|
||||||
wire [ 255:0] replay0_m_axi_wstrb;
|
wire [ 511:0] replay0_m_axi_wstrb;
|
||||||
wire [ 3:0] replay0_m_axi_wlast;
|
wire [ 7:0] replay0_m_axi_wlast;
|
||||||
wire [ 3:0] replay0_m_axi_wuser;
|
wire [ 7:0] replay0_m_axi_wuser;
|
||||||
wire [ 3:0] replay0_m_axi_wvalid;
|
wire [ 7:0] replay0_m_axi_wvalid;
|
||||||
wire [ 3:0] replay0_m_axi_wready;
|
wire [ 7:0] replay0_m_axi_wready;
|
||||||
wire [ 3:0] replay0_m_axi_bid;
|
wire [ 7:0] replay0_m_axi_bid;
|
||||||
wire [ 7:0] replay0_m_axi_bresp;
|
wire [ 15:0] replay0_m_axi_bresp;
|
||||||
wire [ 3:0] replay0_m_axi_buser;
|
wire [ 7:0] replay0_m_axi_buser;
|
||||||
wire [ 3:0] replay0_m_axi_bvalid;
|
wire [ 7:0] replay0_m_axi_bvalid;
|
||||||
wire [ 3:0] replay0_m_axi_bready;
|
wire [ 7:0] replay0_m_axi_bready;
|
||||||
wire [ 3:0] replay0_m_axi_arid;
|
wire [ 7:0] replay0_m_axi_arid;
|
||||||
wire [ 191:0] replay0_m_axi_araddr;
|
wire [ 383:0] replay0_m_axi_araddr;
|
||||||
wire [ 31:0] replay0_m_axi_arlen;
|
wire [ 63:0] replay0_m_axi_arlen;
|
||||||
wire [ 11:0] replay0_m_axi_arsize;
|
wire [ 23:0] replay0_m_axi_arsize;
|
||||||
wire [ 7:0] replay0_m_axi_arburst;
|
wire [ 15:0] replay0_m_axi_arburst;
|
||||||
wire [ 3:0] replay0_m_axi_arlock;
|
wire [ 7:0] replay0_m_axi_arlock;
|
||||||
wire [ 15:0] replay0_m_axi_arcache;
|
wire [ 31:0] replay0_m_axi_arcache;
|
||||||
wire [ 11:0] replay0_m_axi_arprot;
|
wire [ 31:0] replay0_m_axi_arprot;
|
||||||
wire [ 15:0] replay0_m_axi_arqos;
|
wire [ 31:0] replay0_m_axi_arqos;
|
||||||
wire [ 15:0] replay0_m_axi_arregion;
|
wire [ 31:0] replay0_m_axi_arregion;
|
||||||
wire [ 3:0] replay0_m_axi_aruser;
|
wire [ 7:0] replay0_m_axi_aruser;
|
||||||
wire [ 3:0] replay0_m_axi_arvalid;
|
wire [ 7:0] replay0_m_axi_arvalid;
|
||||||
wire [ 3:0] replay0_m_axi_arready;
|
wire [ 7:0] replay0_m_axi_arready;
|
||||||
wire [ 3:0] replay0_m_axi_rid;
|
wire [ 7:0] replay0_m_axi_rid;
|
||||||
wire [2047:0] replay0_m_axi_rdata;
|
wire [4191:0] replay0_m_axi_rdata;
|
||||||
wire [ 7:0] replay0_m_axi_rresp;
|
wire [ 15:0] replay0_m_axi_rresp;
|
||||||
wire [ 3:0] replay0_m_axi_rlast;
|
wire [ 7:0] replay0_m_axi_rlast;
|
||||||
wire [ 3:0] replay0_m_axi_ruser;
|
wire [ 7:0] replay0_m_axi_ruser;
|
||||||
wire [ 3:0] replay0_m_axi_rvalid;
|
wire [ 7:0] replay0_m_axi_rvalid;
|
||||||
wire [ 3:0] replay0_m_axi_rready;
|
wire [ 7:0] replay0_m_axi_rready;
|
||||||
|
|
||||||
rfnoc_block_replay #(
|
rfnoc_block_replay #(
|
||||||
.THIS_PORTID (8),
|
.THIS_PORTID (8),
|
||||||
|
|||||||
+112
-112
@@ -66,65 +66,65 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
input wire [ 63:0] radio_time,
|
input wire [ 63:0] radio_time,
|
||||||
// radio0
|
// radio0
|
||||||
input wire [ 255:0] radio_rx_data_radio0,
|
input wire [1023:0] radio_rx_data_radio0,
|
||||||
input wire [ 7:0] radio_rx_stb_radio0,
|
input wire [ 31:0] radio_rx_stb_radio0,
|
||||||
output wire [ 7:0] radio_rx_running_radio0,
|
output wire [ 31:0] radio_rx_running_radio0,
|
||||||
output wire [ 255:0] radio_tx_data_radio0,
|
output wire [1023:0] radio_tx_data_radio0,
|
||||||
input wire [ 7:0] radio_tx_stb_radio0,
|
input wire [ 31:0] radio_tx_stb_radio0,
|
||||||
output wire [ 7:0] radio_tx_running_radio0,
|
output wire [ 31:0] radio_tx_running_radio0,
|
||||||
// radio1
|
// radio1
|
||||||
input wire [ 255:0] radio_rx_data_radio1,
|
input wire [1023:0] radio_rx_data_radio1,
|
||||||
input wire [ 7:0] radio_rx_stb_radio1,
|
input wire [ 31:0] radio_rx_stb_radio1,
|
||||||
output wire [ 7:0] radio_rx_running_radio1,
|
output wire [ 31:0] radio_rx_running_radio1,
|
||||||
output wire [ 255:0] radio_tx_data_radio1,
|
output wire [1023:0] radio_tx_data_radio1,
|
||||||
input wire [ 7:0] radio_tx_stb_radio1,
|
input wire [ 31:0] radio_tx_stb_radio1,
|
||||||
output wire [ 7:0] radio_tx_running_radio1,
|
output wire [ 31:0] radio_tx_running_radio1,
|
||||||
// dram
|
// dram
|
||||||
input wire [ 0:0] axi_rst,
|
input wire [ 0:0] axi_rst,
|
||||||
output wire [ 3:0] m_axi_awid,
|
output wire [ 7:0] m_axi_awid,
|
||||||
output wire [ 191:0] m_axi_awaddr,
|
output wire [ 383:0] m_axi_awaddr,
|
||||||
output wire [ 31:0] m_axi_awlen,
|
output wire [ 63:0] m_axi_awlen,
|
||||||
output wire [ 11:0] m_axi_awsize,
|
output wire [ 23:0] m_axi_awsize,
|
||||||
output wire [ 7:0] m_axi_awburst,
|
output wire [ 15:0] m_axi_awburst,
|
||||||
output wire [ 3:0] m_axi_awlock,
|
output wire [ 7:0] m_axi_awlock,
|
||||||
output wire [ 15:0] m_axi_awcache,
|
output wire [ 31:0] m_axi_awcache,
|
||||||
output wire [ 11:0] m_axi_awprot,
|
output wire [ 23:0] m_axi_awprot,
|
||||||
output wire [ 15:0] m_axi_awqos,
|
output wire [ 31:0] m_axi_awqos,
|
||||||
output wire [ 15:0] m_axi_awregion,
|
output wire [ 31:0] m_axi_awregion,
|
||||||
output wire [ 3:0] m_axi_awuser,
|
output wire [ 7:0] m_axi_awuser,
|
||||||
output wire [ 3:0] m_axi_awvalid,
|
output wire [ 7:0] m_axi_awvalid,
|
||||||
input wire [ 3:0] m_axi_awready,
|
input wire [ 7:0] m_axi_awready,
|
||||||
output wire [2047:0] m_axi_wdata,
|
output wire [4191:0] m_axi_wdata,
|
||||||
output wire [ 255:0] m_axi_wstrb,
|
output wire [ 511:0] m_axi_wstrb,
|
||||||
output wire [ 3:0] m_axi_wlast,
|
output wire [ 7:0] m_axi_wlast,
|
||||||
output wire [ 3:0] m_axi_wuser,
|
output wire [ 7:0] m_axi_wuser,
|
||||||
output wire [ 3:0] m_axi_wvalid,
|
output wire [ 7:0] m_axi_wvalid,
|
||||||
input wire [ 3:0] m_axi_wready,
|
input wire [ 7:0] m_axi_wready,
|
||||||
input wire [ 3:0] m_axi_bid,
|
input wire [ 7:0] m_axi_bid,
|
||||||
input wire [ 7:0] m_axi_bresp,
|
input wire [ 15:0] m_axi_bresp,
|
||||||
input wire [ 3:0] m_axi_buser,
|
input wire [ 7:0] m_axi_buser,
|
||||||
input wire [ 3:0] m_axi_bvalid,
|
input wire [ 7:0] m_axi_bvalid,
|
||||||
output wire [ 3:0] m_axi_bready,
|
output wire [ 7:0] m_axi_bready,
|
||||||
output wire [ 3:0] m_axi_arid,
|
output wire [ 7:0] m_axi_arid,
|
||||||
output wire [ 191:0] m_axi_araddr,
|
output wire [ 383:0] m_axi_araddr,
|
||||||
output wire [ 31:0] m_axi_arlen,
|
output wire [ 63:0] m_axi_arlen,
|
||||||
output wire [ 11:0] m_axi_arsize,
|
output wire [ 23:0] m_axi_arsize,
|
||||||
output wire [ 7:0] m_axi_arburst,
|
output wire [ 15:0] m_axi_arburst,
|
||||||
output wire [ 3:0] m_axi_arlock,
|
output wire [ 7:0] m_axi_arlock,
|
||||||
output wire [ 15:0] m_axi_arcache,
|
output wire [ 31:0] m_axi_arcache,
|
||||||
output wire [ 11:0] m_axi_arprot,
|
output wire [ 31:0] m_axi_arprot,
|
||||||
output wire [ 15:0] m_axi_arqos,
|
output wire [ 31:0] m_axi_arqos,
|
||||||
output wire [ 15:0] m_axi_arregion,
|
output wire [ 31:0] m_axi_arregion,
|
||||||
output wire [ 3:0] m_axi_aruser,
|
output wire [ 7:0] m_axi_aruser,
|
||||||
output wire [ 3:0] m_axi_arvalid,
|
output wire [ 7:0] m_axi_arvalid,
|
||||||
input wire [ 3:0] m_axi_arready,
|
input wire [ 7:0] m_axi_arready,
|
||||||
input wire [ 3:0] m_axi_rid,
|
input wire [ 7:0] m_axi_rid,
|
||||||
input wire [2047:0] m_axi_rdata,
|
input wire [4191:0] m_axi_rdata,
|
||||||
input wire [ 7:0] m_axi_rresp,
|
input wire [ 15:0] m_axi_rresp,
|
||||||
input wire [ 3:0] m_axi_rlast,
|
input wire [ 7:0] m_axi_rlast,
|
||||||
input wire [ 3:0] m_axi_ruser,
|
input wire [ 7:0] m_axi_ruser,
|
||||||
input wire [ 3:0] m_axi_rvalid,
|
input wire [ 7:0] m_axi_rvalid,
|
||||||
output wire [ 3:0] m_axi_rready,
|
output wire [ 7:0] m_axi_rready,
|
||||||
|
|
||||||
// Transport Adapters ///////////////
|
// Transport Adapters ///////////////
|
||||||
|
|
||||||
@@ -926,12 +926,12 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
wire [ 63:0] radio0_radio_time;
|
wire [ 63:0] radio0_radio_time;
|
||||||
// radio
|
// radio
|
||||||
wire [ 255:0] radio0_radio_rx_data;
|
wire [1023:0] radio0_radio_rx_data;
|
||||||
wire [ 7:0] radio0_radio_rx_stb;
|
wire [ 31:0] radio0_radio_rx_stb;
|
||||||
wire [ 7:0] radio0_radio_rx_running;
|
wire [ 31:0] radio0_radio_rx_running;
|
||||||
wire [ 255:0] radio0_radio_tx_data;
|
wire [1023:0] radio0_radio_tx_data;
|
||||||
wire [ 7:0] radio0_radio_tx_stb;
|
wire [ 31:0] radio0_radio_tx_stb;
|
||||||
wire [ 7:0] radio0_radio_tx_running;
|
wire [ 31:0] radio0_radio_tx_running;
|
||||||
|
|
||||||
rfnoc_block_radio #(
|
rfnoc_block_radio #(
|
||||||
.THIS_PORTID (4),
|
.THIS_PORTID (4),
|
||||||
@@ -1099,12 +1099,12 @@ module rfnoc_image_core #(
|
|||||||
// time
|
// time
|
||||||
wire [ 63:0] radio1_radio_time;
|
wire [ 63:0] radio1_radio_time;
|
||||||
// radio
|
// radio
|
||||||
wire [ 255:0] radio1_radio_rx_data;
|
wire [1023:0] radio1_radio_rx_data;
|
||||||
wire [ 7:0] radio1_radio_rx_stb;
|
wire [ 31:0] radio1_radio_rx_stb;
|
||||||
wire [ 7:0] radio1_radio_rx_running;
|
wire [ 31:0] radio1_radio_rx_running;
|
||||||
wire [ 255:0] radio1_radio_tx_data;
|
wire [1023:0] radio1_radio_tx_data;
|
||||||
wire [ 7:0] radio1_radio_tx_stb;
|
wire [ 31:0] radio1_radio_tx_stb;
|
||||||
wire [ 7:0] radio1_radio_tx_running;
|
wire [ 31:0] radio1_radio_tx_running;
|
||||||
|
|
||||||
rfnoc_block_radio #(
|
rfnoc_block_radio #(
|
||||||
.THIS_PORTID (7),
|
.THIS_PORTID (7),
|
||||||
@@ -1170,50 +1170,50 @@ module rfnoc_image_core #(
|
|||||||
|
|
||||||
// axi_ram
|
// axi_ram
|
||||||
wire [ 0:0] replay0_axi_rst;
|
wire [ 0:0] replay0_axi_rst;
|
||||||
wire [ 3:0] replay0_m_axi_awid;
|
wire [ 7:0] replay0_m_axi_awid;
|
||||||
wire [ 191:0] replay0_m_axi_awaddr;
|
wire [ 383:0] replay0_m_axi_awaddr;
|
||||||
wire [ 31:0] replay0_m_axi_awlen;
|
wire [ 63:0] replay0_m_axi_awlen;
|
||||||
wire [ 11:0] replay0_m_axi_awsize;
|
wire [ 23:0] replay0_m_axi_awsize;
|
||||||
wire [ 7:0] replay0_m_axi_awburst;
|
wire [ 15:0] replay0_m_axi_awburst;
|
||||||
wire [ 3:0] replay0_m_axi_awlock;
|
wire [ 7:0] replay0_m_axi_awlock;
|
||||||
wire [ 15:0] replay0_m_axi_awcache;
|
wire [ 31:0] replay0_m_axi_awcache;
|
||||||
wire [ 11:0] replay0_m_axi_awprot;
|
wire [ 23:0] replay0_m_axi_awprot;
|
||||||
wire [ 15:0] replay0_m_axi_awqos;
|
wire [ 31:0] replay0_m_axi_awqos;
|
||||||
wire [ 15:0] replay0_m_axi_awregion;
|
wire [ 31:0] replay0_m_axi_awregion;
|
||||||
wire [ 3:0] replay0_m_axi_awuser;
|
wire [ 7:0] replay0_m_axi_awuser;
|
||||||
wire [ 3:0] replay0_m_axi_awvalid;
|
wire [ 7:0] replay0_m_axi_awvalid;
|
||||||
wire [ 3:0] replay0_m_axi_awready;
|
wire [ 7:0] replay0_m_axi_awready;
|
||||||
wire [2047:0] replay0_m_axi_wdata;
|
wire [4191:0] replay0_m_axi_wdata;
|
||||||
wire [ 255:0] replay0_m_axi_wstrb;
|
wire [ 511:0] replay0_m_axi_wstrb;
|
||||||
wire [ 3:0] replay0_m_axi_wlast;
|
wire [ 7:0] replay0_m_axi_wlast;
|
||||||
wire [ 3:0] replay0_m_axi_wuser;
|
wire [ 7:0] replay0_m_axi_wuser;
|
||||||
wire [ 3:0] replay0_m_axi_wvalid;
|
wire [ 7:0] replay0_m_axi_wvalid;
|
||||||
wire [ 3:0] replay0_m_axi_wready;
|
wire [ 7:0] replay0_m_axi_wready;
|
||||||
wire [ 3:0] replay0_m_axi_bid;
|
wire [ 7:0] replay0_m_axi_bid;
|
||||||
wire [ 7:0] replay0_m_axi_bresp;
|
wire [ 15:0] replay0_m_axi_bresp;
|
||||||
wire [ 3:0] replay0_m_axi_buser;
|
wire [ 7:0] replay0_m_axi_buser;
|
||||||
wire [ 3:0] replay0_m_axi_bvalid;
|
wire [ 7:0] replay0_m_axi_bvalid;
|
||||||
wire [ 3:0] replay0_m_axi_bready;
|
wire [ 7:0] replay0_m_axi_bready;
|
||||||
wire [ 3:0] replay0_m_axi_arid;
|
wire [ 7:0] replay0_m_axi_arid;
|
||||||
wire [ 191:0] replay0_m_axi_araddr;
|
wire [ 383:0] replay0_m_axi_araddr;
|
||||||
wire [ 31:0] replay0_m_axi_arlen;
|
wire [ 63:0] replay0_m_axi_arlen;
|
||||||
wire [ 11:0] replay0_m_axi_arsize;
|
wire [ 23:0] replay0_m_axi_arsize;
|
||||||
wire [ 7:0] replay0_m_axi_arburst;
|
wire [ 15:0] replay0_m_axi_arburst;
|
||||||
wire [ 3:0] replay0_m_axi_arlock;
|
wire [ 7:0] replay0_m_axi_arlock;
|
||||||
wire [ 15:0] replay0_m_axi_arcache;
|
wire [ 31:0] replay0_m_axi_arcache;
|
||||||
wire [ 11:0] replay0_m_axi_arprot;
|
wire [ 31:0] replay0_m_axi_arprot;
|
||||||
wire [ 15:0] replay0_m_axi_arqos;
|
wire [ 31:0] replay0_m_axi_arqos;
|
||||||
wire [ 15:0] replay0_m_axi_arregion;
|
wire [ 31:0] replay0_m_axi_arregion;
|
||||||
wire [ 3:0] replay0_m_axi_aruser;
|
wire [ 7:0] replay0_m_axi_aruser;
|
||||||
wire [ 3:0] replay0_m_axi_arvalid;
|
wire [ 7:0] replay0_m_axi_arvalid;
|
||||||
wire [ 3:0] replay0_m_axi_arready;
|
wire [ 7:0] replay0_m_axi_arready;
|
||||||
wire [ 3:0] replay0_m_axi_rid;
|
wire [ 7:0] replay0_m_axi_rid;
|
||||||
wire [2047:0] replay0_m_axi_rdata;
|
wire [4191:0] replay0_m_axi_rdata;
|
||||||
wire [ 7:0] replay0_m_axi_rresp;
|
wire [ 15:0] replay0_m_axi_rresp;
|
||||||
wire [ 3:0] replay0_m_axi_rlast;
|
wire [ 7:0] replay0_m_axi_rlast;
|
||||||
wire [ 3:0] replay0_m_axi_ruser;
|
wire [ 7:0] replay0_m_axi_ruser;
|
||||||
wire [ 3:0] replay0_m_axi_rvalid;
|
wire [ 7:0] replay0_m_axi_rvalid;
|
||||||
wire [ 3:0] replay0_m_axi_rready;
|
wire [ 7:0] replay0_m_axi_rready;
|
||||||
|
|
||||||
rfnoc_block_replay #(
|
rfnoc_block_replay #(
|
||||||
.THIS_PORTID (8),
|
.THIS_PORTID (8),
|
||||||
|
|||||||
Reference in New Issue
Block a user