miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

rfnoc: Update blocks to use autogenerated noc_shell

Browse Source 
Original-commit: b746819769e6a960f8227981ea10c7ed9c3d826a
This commit is contained in:
Wade Fife
2020-02-06 14:50:33 -06:00
committed by Wade Fife
parent a69290143b
commit 59adae6252
23 changed files with 2411 additions and 1829 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/rfnoc/blocks/rfnoc_block_fft/noc_shell_fft.v
+243 -230
View File
@@ -1,131 +1,117 @@
//
// Copyright 2019 Ettus Research, A National Instruments Company
// Copyright 2019 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: noc_shell_fft
//
// Description:
//
// This is a tool-generated NoC-shell for the fft block.
// See the RFNoC specification for more information about NoC shells.
//
// Parameters:
//
// THIS_PORTID : Control crossbar port to which this block is connected
// CHDR_W : AXIS-CHDR data bus width
// MTU : Maximum transmission unit (i.e., maximum packet size in
//
`default_nettype none
module noc_shell_fft #(
parameter [31:0] NOC_ID = 32 'h0,
parameter [ 9:0] THIS_PORTID = 10 'd0,
parameter CHDR_W = 64,
parameter [ 0:0] CTRLPORT_SLV_EN = 1,
parameter [ 0:0] CTRLPORT_MST_EN = 1,
parameter SYNC_CLKS = 0,
parameter [ 5:0] NUM_DATA_I = 1,
parameter [ 5:0] NUM_DATA_O = 1,
parameter ITEM_W = 32,
parameter NIPC = 2,
parameter PYLD_FIFO_SIZE = 5,
parameter CTXT_FIFO_SIZE = 5,
parameter MTU = 10
parameter [9:0] THIS_PORTID = 10'd0,
parameter CHDR_W = 64,
parameter [5:0] MTU = 10,
parameter EN_MAGNITUDE_OUT = 0,
parameter EN_MAGNITUDE_APPROX_OUT = 1,
parameter EN_MAGNITUDE_SQ_OUT = 1,
parameter EN_FFT_SHIFT = 1
) (
//---------------------------------------------------------------------------
//---------------------
// Framework Interface
//---------------------------------------------------------------------------
//---------------------
// RFNoC Framework Clocks
input wire rfnoc_chdr_clk,
input wire rfnoc_ctrl_clk,
input wire ce_clk,
// NoC Shell Generated Resets
output wire rfnoc_chdr_rst,
output wire rfnoc_ctrl_rst,
output wire ce_rst,
// RFNoC Framework Clocks and Resets
input wire rfnoc_chdr_clk,
output wire rfnoc_chdr_rst,
input wire rfnoc_ctrl_clk,
output wire rfnoc_ctrl_rst,
// RFNoC Backend Interface
input wire [ 511:0] rfnoc_core_config,
output wire [ 511:0] rfnoc_core_status,
// CHDR Input Ports (from framework)
input wire [(CHDR_W*NUM_DATA_I)-1:0] s_rfnoc_chdr_tdata,
input wire [ NUM_DATA_I-1:0] s_rfnoc_chdr_tlast,
input wire [ NUM_DATA_I-1:0] s_rfnoc_chdr_tvalid,
output wire [ NUM_DATA_I-1:0] s_rfnoc_chdr_tready,
// CHDR Output Ports (to framework)
output wire [(CHDR_W*NUM_DATA_O)-1:0] m_rfnoc_chdr_tdata,
output wire [ NUM_DATA_O-1:0] m_rfnoc_chdr_tlast,
output wire [ NUM_DATA_O-1:0] m_rfnoc_chdr_tvalid,
input wire [ NUM_DATA_O-1:0] m_rfnoc_chdr_tready,
// AXIS-Ctrl Input Port (from framework)
input wire [ 31:0] s_rfnoc_ctrl_tdata,
input wire s_rfnoc_ctrl_tlast,
input wire s_rfnoc_ctrl_tvalid,
output wire s_rfnoc_ctrl_tready,
// AXIS-Ctrl Output Port (to framework)
output wire [ 31:0] m_rfnoc_ctrl_tdata,
output wire m_rfnoc_ctrl_tlast,
output wire m_rfnoc_ctrl_tvalid,
input wire m_rfnoc_ctrl_tready,
input wire [511:0] rfnoc_core_config,
output wire [511:0] rfnoc_core_status,
//---------------------------------------------------------------------------
// Client Control Port Interface
//---------------------------------------------------------------------------
// AXIS-CHDR Input Ports (from framework)
input wire [(1)*CHDR_W-1:0] s_rfnoc_chdr_tdata,
input wire [(1)-1:0] s_rfnoc_chdr_tlast,
input wire [(1)-1:0] s_rfnoc_chdr_tvalid,
output wire [(1)-1:0] s_rfnoc_chdr_tready,
// AXIS-CHDR Output Ports (to framework)
output wire [(1)*CHDR_W-1:0] m_rfnoc_chdr_tdata,
output wire [(1)-1:0] m_rfnoc_chdr_tlast,
output wire [(1)-1:0] m_rfnoc_chdr_tvalid,
input wire [(1)-1:0] m_rfnoc_chdr_tready,
// Clock
input wire ctrlport_clk,
input wire ctrlport_rst,
// Master
output wire m_ctrlport_req_wr,
output wire m_ctrlport_req_rd,
output wire [19:0] m_ctrlport_req_addr,
output wire [31:0] m_ctrlport_req_data,
output wire [ 3:0] m_ctrlport_req_byte_en,
output wire m_ctrlport_req_has_time,
output wire [63:0] m_ctrlport_req_time,
input wire m_ctrlport_resp_ack,
input wire [ 1:0] m_ctrlport_resp_status,
input wire [31:0] m_ctrlport_resp_data,
// Slave
input wire s_ctrlport_req_wr,
input wire s_ctrlport_req_rd,
input wire [19:0] s_ctrlport_req_addr,
input wire [ 9:0] s_ctrlport_req_portid,
input wire [15:0] s_ctrlport_req_rem_epid,
input wire [ 9:0] s_ctrlport_req_rem_portid,
input wire [31:0] s_ctrlport_req_data,
input wire [ 3:0] s_ctrlport_req_byte_en,
input wire s_ctrlport_req_has_time,
input wire [63:0] s_ctrlport_req_time,
output wire s_ctrlport_resp_ack,
output wire [ 1:0] s_ctrlport_resp_status,
output wire [31:0] s_ctrlport_resp_data,
// AXIS-Ctrl Control Input Port (from framework)
input wire [31:0] s_rfnoc_ctrl_tdata,
input wire s_rfnoc_ctrl_tlast,
input wire s_rfnoc_ctrl_tvalid,
output wire s_rfnoc_ctrl_tready,
// AXIS-Ctrl Control Output Port (to framework)
output wire [31:0] m_rfnoc_ctrl_tdata,
output wire m_rfnoc_ctrl_tlast,
output wire m_rfnoc_ctrl_tvalid,
input wire m_rfnoc_ctrl_tready,
//---------------------------------------------------------------------------
// Client Data Interface
//---------------------------------------------------------------------------
//---------------------
// Client Interface
//---------------------
// Clock
input wire axis_data_clk,
input wire axis_data_rst,
// CtrlPort Clock and Reset
output wire ctrlport_clk,
output wire ctrlport_rst,
// CtrlPort Master
output wire m_ctrlport_req_wr,
output wire m_ctrlport_req_rd,
output wire [19:0] m_ctrlport_req_addr,
output wire [31:0] m_ctrlport_req_data,
input wire m_ctrlport_resp_ack,
input wire [31:0] m_ctrlport_resp_data,
// Output data stream (to user logic)
output wire [(NUM_DATA_I*ITEM_W*NIPC)-1:0] m_axis_payload_tdata,
output wire [ (NUM_DATA_I*NIPC)-1:0] m_axis_payload_tkeep,
output wire [ NUM_DATA_I-1:0] m_axis_payload_tlast,
output wire [ NUM_DATA_I-1:0] m_axis_payload_tvalid,
input wire [ NUM_DATA_I-1:0] m_axis_payload_tready,
// Input data stream (from user logic)
input wire [(NUM_DATA_O*ITEM_W*NIPC)-1:0] s_axis_payload_tdata,
input wire [ (NUM_DATA_O*NIPC)-1:0] s_axis_payload_tkeep,
input wire [ NUM_DATA_O-1:0] s_axis_payload_tlast,
input wire [ NUM_DATA_O-1:0] s_axis_payload_tvalid,
output wire [ NUM_DATA_O-1:0] s_axis_payload_tready,
// Output context stream (to user logic)
output wire [(NUM_DATA_I*CHDR_W)-1:0] m_axis_context_tdata,
output wire [ (4*NUM_DATA_I)-1:0] m_axis_context_tuser,
output wire [ NUM_DATA_I-1:0] m_axis_context_tlast,
output wire [ NUM_DATA_I-1:0] m_axis_context_tvalid,
input wire [ NUM_DATA_I-1:0] m_axis_context_tready,
// Input context stream (from user logic)
input wire [(NUM_DATA_O*CHDR_W)-1:0] s_axis_context_tdata,
input wire [ (4*NUM_DATA_O)-1:0] s_axis_context_tuser,
input wire [ NUM_DATA_O-1:0] s_axis_context_tlast,
input wire [ NUM_DATA_O-1:0] s_axis_context_tvalid,
output wire [ NUM_DATA_O-1:0] s_axis_context_tready
// AXI-Stream Payload Context Clock and Reset
output wire axis_data_clk,
output wire axis_data_rst,
// Payload Stream to User Logic: in_0
output wire [32*1-1:0] m_in_0_payload_tdata,
output wire [1-1:0] m_in_0_payload_tkeep,
output wire m_in_0_payload_tlast,
output wire m_in_0_payload_tvalid,
input wire m_in_0_payload_tready,
// Context Stream to User Logic: in_0
output wire [CHDR_W-1:0] m_in_0_context_tdata,
output wire [3:0] m_in_0_context_tuser,
output wire m_in_0_context_tlast,
output wire m_in_0_context_tvalid,
input wire m_in_0_context_tready,
// Payload Stream from User Logic: out_0
input wire [32*1-1:0] s_out_0_payload_tdata,
input wire [0:0] s_out_0_payload_tkeep,
input wire s_out_0_payload_tlast,
input wire s_out_0_payload_tvalid,
output wire s_out_0_payload_tready,
// Context Stream from User Logic: out_0
input wire [CHDR_W-1:0] s_out_0_context_tdata,
input wire [3:0] s_out_0_context_tuser,
input wire s_out_0_context_tlast,
input wire s_out_0_context_tvalid,
output wire s_out_0_context_tready
);
localparam CTRL_FIFO_SIZE = 5;
//---------------------------------------------------------------------------
// Backend Interface
@@ -141,18 +127,18 @@ module noc_shell_fft #(
wire [63:0] data_o_flush_done;
backend_iface #(
.NOC_ID (NOC_ID),
.NUM_DATA_I (NUM_DATA_I),
.NUM_DATA_O (NUM_DATA_O),
.CTRL_FIFOSIZE (CTRL_FIFO_SIZE),
.NOC_ID (32'hFF700000),
.NUM_DATA_I (1),
.NUM_DATA_O (1),
.CTRL_FIFOSIZE ($clog2(32)),
.MTU (MTU)
) backend_iface_i (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
.rfnoc_chdr_rst (rfnoc_chdr_rst),
.rfnoc_ctrl_clk (rfnoc_ctrl_clk),
.rfnoc_ctrl_rst (rfnoc_ctrl_rst),
.rfnoc_core_config (rfnoc_core_config),
.rfnoc_core_status (rfnoc_core_status),
.rfnoc_chdr_rst (rfnoc_chdr_rst),
.rfnoc_ctrl_rst (rfnoc_ctrl_rst),
.data_i_flush_en (data_i_flush_en),
.data_i_flush_timeout (data_i_flush_timeout),
.data_i_flush_active (data_i_flush_active),
@@ -163,52 +149,71 @@ module noc_shell_fft #(
.data_o_flush_done (data_o_flush_done)
);
//---------------------------------------------------------------------------
// Reset Generation
//---------------------------------------------------------------------------
wire ce_rst_pulse;
pulse_synchronizer #(.MODE ("POSEDGE")) pulse_synchronizer_ce (
.clk_a(rfnoc_chdr_clk), .rst_a(1'b0), .pulse_a (rfnoc_chdr_rst), .busy_a (),
.clk_b(ce_clk), .pulse_b (ce_rst_pulse)
);
pulse_stretch_min #(.LENGTH(32)) pulse_stretch_min_ce (
.clk(ce_clk), .rst(1'b0),
.pulse_in(ce_rst_pulse), .pulse_out(ce_rst)
);
//---------------------------------------------------------------------------
// Control Path
//---------------------------------------------------------------------------
assign ctrlport_clk = ce_clk;
assign ctrlport_rst = ce_rst;
ctrlport_endpoint #(
.THIS_PORTID (THIS_PORTID ),
.SYNC_CLKS (0 ),
.AXIS_CTRL_MST_EN (CTRLPORT_SLV_EN),
.AXIS_CTRL_SLV_EN (CTRLPORT_MST_EN),
.SLAVE_FIFO_SIZE (CTRL_FIFO_SIZE )
) ctrlport_ep_i (
.rfnoc_ctrl_clk (rfnoc_ctrl_clk ),
.rfnoc_ctrl_rst (rfnoc_ctrl_rst ),
.ctrlport_clk (ctrlport_clk ),
.ctrlport_rst (ctrlport_rst ),
.s_rfnoc_ctrl_tdata (s_rfnoc_ctrl_tdata ),
.s_rfnoc_ctrl_tlast (s_rfnoc_ctrl_tlast ),
.s_rfnoc_ctrl_tvalid (s_rfnoc_ctrl_tvalid ),
.s_rfnoc_ctrl_tready (s_rfnoc_ctrl_tready ),
.m_rfnoc_ctrl_tdata (m_rfnoc_ctrl_tdata ),
.m_rfnoc_ctrl_tlast (m_rfnoc_ctrl_tlast ),
.m_rfnoc_ctrl_tvalid (m_rfnoc_ctrl_tvalid ),
.m_rfnoc_ctrl_tready (m_rfnoc_ctrl_tready ),
.m_ctrlport_req_wr (m_ctrlport_req_wr ),
.m_ctrlport_req_rd (m_ctrlport_req_rd ),
.m_ctrlport_req_addr (m_ctrlport_req_addr ),
.m_ctrlport_req_data (m_ctrlport_req_data ),
.m_ctrlport_req_byte_en (m_ctrlport_req_byte_en ),
.m_ctrlport_req_has_time (m_ctrlport_req_has_time ),
.m_ctrlport_req_time (m_ctrlport_req_time ),
.m_ctrlport_resp_ack (m_ctrlport_resp_ack ),
.m_ctrlport_resp_status (m_ctrlport_resp_status ),
.m_ctrlport_resp_data (m_ctrlport_resp_data ),
.s_ctrlport_req_wr (s_ctrlport_req_wr ),
.s_ctrlport_req_rd (s_ctrlport_req_rd ),
.s_ctrlport_req_addr (s_ctrlport_req_addr ),
.s_ctrlport_req_portid (s_ctrlport_req_portid ),
.s_ctrlport_req_rem_epid (s_ctrlport_req_rem_epid ),
.s_ctrlport_req_rem_portid(s_ctrlport_req_rem_portid),
.s_ctrlport_req_data (s_ctrlport_req_data ),
.s_ctrlport_req_byte_en (s_ctrlport_req_byte_en ),
.s_ctrlport_req_has_time (s_ctrlport_req_has_time ),
.s_ctrlport_req_time (s_ctrlport_req_time ),
.s_ctrlport_resp_ack (s_ctrlport_resp_ack ),
.s_ctrlport_resp_status (s_ctrlport_resp_status ),
.s_ctrlport_resp_data (s_ctrlport_resp_data )
.THIS_PORTID (THIS_PORTID),
.SYNC_CLKS (0),
.AXIS_CTRL_MST_EN (0),
.AXIS_CTRL_SLV_EN (1),
.SLAVE_FIFO_SIZE ($clog2(32))
) ctrlport_endpoint_i (
.rfnoc_ctrl_clk (rfnoc_ctrl_clk),
.rfnoc_ctrl_rst (rfnoc_ctrl_rst),
.ctrlport_clk (ctrlport_clk),
.ctrlport_rst (ctrlport_rst),
.s_rfnoc_ctrl_tdata (s_rfnoc_ctrl_tdata),
.s_rfnoc_ctrl_tlast (s_rfnoc_ctrl_tlast),
.s_rfnoc_ctrl_tvalid (s_rfnoc_ctrl_tvalid),
.s_rfnoc_ctrl_tready (s_rfnoc_ctrl_tready),
.m_rfnoc_ctrl_tdata (m_rfnoc_ctrl_tdata),
.m_rfnoc_ctrl_tlast (m_rfnoc_ctrl_tlast),
.m_rfnoc_ctrl_tvalid (m_rfnoc_ctrl_tvalid),
.m_rfnoc_ctrl_tready (m_rfnoc_ctrl_tready),
.m_ctrlport_req_wr (m_ctrlport_req_wr),
.m_ctrlport_req_rd (m_ctrlport_req_rd),
.m_ctrlport_req_addr (m_ctrlport_req_addr),
.m_ctrlport_req_data (m_ctrlport_req_data),
.m_ctrlport_req_byte_en (),
.m_ctrlport_req_has_time (),
.m_ctrlport_req_time (),
.m_ctrlport_resp_ack (m_ctrlport_resp_ack),
.m_ctrlport_resp_status (2'b0),
.m_ctrlport_resp_data (m_ctrlport_resp_data),
.s_ctrlport_req_wr (1'b0),
.s_ctrlport_req_rd (1'b0),
.s_ctrlport_req_addr (20'b0),
.s_ctrlport_req_portid (10'b0),
.s_ctrlport_req_rem_epid (16'b0),
.s_ctrlport_req_rem_portid (10'b0),
.s_ctrlport_req_data (32'b0),
.s_ctrlport_req_byte_en (4'hF),
.s_ctrlport_req_has_time (1'b0),
.s_ctrlport_req_time (64'b0),
.s_ctrlport_resp_ack (),
.s_ctrlport_resp_status (),
.s_ctrlport_resp_data ()
);
//---------------------------------------------------------------------------
@@ -216,79 +221,87 @@ module noc_shell_fft #(
//---------------------------------------------------------------------------
genvar i;
generate
for (i = 0; i < NUM_DATA_I; i = i + 1) begin: chdr_to_data
chdr_to_axis_pyld_ctxt #(
.CHDR_W (CHDR_W ),
.ITEM_W (ITEM_W ),
.NIPC (NIPC ),
.SYNC_CLKS (SYNC_CLKS ),
.CONTEXT_FIFO_SIZE (CTXT_FIFO_SIZE),
.PAYLOAD_FIFO_SIZE (PYLD_FIFO_SIZE),
.CONTEXT_PREFETCH_EN (1 )
) chdr_to_axis_pyld_ctxt_i (
.axis_chdr_clk (rfnoc_chdr_clk ),
.axis_chdr_rst (rfnoc_chdr_rst ),
.axis_data_clk (axis_data_clk ),
.axis_data_rst (axis_data_rst ),
.s_axis_chdr_tdata (s_rfnoc_chdr_tdata [(i*CHDR_W)+:CHDR_W] ),
.s_axis_chdr_tlast (s_rfnoc_chdr_tlast [i] ),
.s_axis_chdr_tvalid (s_rfnoc_chdr_tvalid [i] ),
.s_axis_chdr_tready (s_rfnoc_chdr_tready [i] ),
.m_axis_payload_tdata (m_axis_payload_tdata [(i*ITEM_W*NIPC)+:(ITEM_W*NIPC)]),
.m_axis_payload_tkeep (m_axis_payload_tkeep [(i*NIPC)+:NIPC] ),
.m_axis_payload_tlast (m_axis_payload_tlast [i] ),
.m_axis_payload_tvalid(m_axis_payload_tvalid[i] ),
.m_axis_payload_tready(m_axis_payload_tready[i] ),
.m_axis_context_tdata (m_axis_context_tdata [(i*CHDR_W)+:(CHDR_W)] ),
.m_axis_context_tuser (m_axis_context_tuser [(i*4)+:4] ),
.m_axis_context_tlast (m_axis_context_tlast [i] ),
.m_axis_context_tvalid(m_axis_context_tvalid[i] ),
.m_axis_context_tready(m_axis_context_tready[i] ),
.flush_en (data_i_flush_en ),
.flush_timeout (data_i_flush_timeout ),
.flush_active (data_i_flush_active [i] ),
.flush_done (data_i_flush_done [i] )
);
end
assign axis_data_clk = ce_clk;
assign axis_data_rst = ce_rst;
for (i = 0; i < NUM_DATA_O; i = i + 1) begin: data_to_chdr
axis_pyld_ctxt_to_chdr #(
.CHDR_W (CHDR_W ),
.ITEM_W (ITEM_W ),
.NIPC (NIPC ),
.SYNC_CLKS (SYNC_CLKS ),
.CONTEXT_FIFO_SIZE (CTXT_FIFO_SIZE),
.PAYLOAD_FIFO_SIZE (PYLD_FIFO_SIZE),
.CONTEXT_PREFETCH_EN (1 ),
.MTU (MTU )
) axis_pyld_ctxt_to_chdr_i (
.axis_chdr_clk (rfnoc_chdr_clk ),
.axis_chdr_rst (rfnoc_chdr_rst ),
.axis_data_clk (axis_data_clk ),
.axis_data_rst (axis_data_rst ),
.m_axis_chdr_tdata (m_rfnoc_chdr_tdata [(i*CHDR_W)+:CHDR_W] ),
.m_axis_chdr_tlast (m_rfnoc_chdr_tlast [i] ),
.m_axis_chdr_tvalid (m_rfnoc_chdr_tvalid [i] ),
.m_axis_chdr_tready (m_rfnoc_chdr_tready [i] ),
.s_axis_payload_tdata (s_axis_payload_tdata [(i*ITEM_W*NIPC)+:(ITEM_W*NIPC)]),
.s_axis_payload_tkeep (s_axis_payload_tkeep [(i*NIPC)+:NIPC] ),
.s_axis_payload_tlast (s_axis_payload_tlast [i] ),
.s_axis_payload_tvalid(s_axis_payload_tvalid[i] ),
.s_axis_payload_tready(s_axis_payload_tready[i] ),
.s_axis_context_tdata (s_axis_context_tdata [(i*CHDR_W)+:(CHDR_W)] ),
.s_axis_context_tuser (s_axis_context_tuser [(i*4)+:4] ),
.s_axis_context_tlast (s_axis_context_tlast [i] ),
.s_axis_context_tvalid(s_axis_context_tvalid[i] ),
.s_axis_context_tready(s_axis_context_tready[i] ),
.framer_errors ( ),
.flush_en (data_o_flush_en ),
.flush_timeout (data_o_flush_timeout ),
.flush_active (data_o_flush_active [i] ),
.flush_done (data_o_flush_done [i] )
);
end
endgenerate
//---------------------
// Input Data Paths
//---------------------
endmodule
chdr_to_axis_pyld_ctxt #(
.CHDR_W (CHDR_W),
.ITEM_W (32),
.NIPC (1),
.SYNC_CLKS (0),
.CONTEXT_FIFO_SIZE ($clog2(2)),
.PAYLOAD_FIFO_SIZE ($clog2(32)),
.CONTEXT_PREFETCH_EN (1)
) chdr_to_axis_pyld_ctxt_in_in_0 (
.axis_chdr_clk (rfnoc_chdr_clk),
.axis_chdr_rst (rfnoc_chdr_rst),
.axis_data_clk (axis_data_clk),
.axis_data_rst (axis_data_rst),
.s_axis_chdr_tdata (s_rfnoc_chdr_tdata[(0)*CHDR_W+:CHDR_W]),
.s_axis_chdr_tlast (s_rfnoc_chdr_tlast[0]),
.s_axis_chdr_tvalid (s_rfnoc_chdr_tvalid[0]),
.s_axis_chdr_tready (s_rfnoc_chdr_tready[0]),
.m_axis_payload_tdata (m_in_0_payload_tdata),
.m_axis_payload_tkeep (m_in_0_payload_tkeep),
.m_axis_payload_tlast (m_in_0_payload_tlast),
.m_axis_payload_tvalid (m_in_0_payload_tvalid),
.m_axis_payload_tready (m_in_0_payload_tready),
.m_axis_context_tdata (m_in_0_context_tdata),
.m_axis_context_tuser (m_in_0_context_tuser),
.m_axis_context_tlast (m_in_0_context_tlast),
.m_axis_context_tvalid (m_in_0_context_tvalid),
.m_axis_context_tready (m_in_0_context_tready),
.flush_en (data_i_flush_en),
.flush_timeout (data_i_flush_timeout),
.flush_active (data_i_flush_active[0]),
.flush_done (data_i_flush_done[0])
);
//---------------------
// Output Data Paths
//---------------------
axis_pyld_ctxt_to_chdr #(
.CHDR_W (CHDR_W),
.ITEM_W (32),
.NIPC (1),
.SYNC_CLKS (0),
.CONTEXT_FIFO_SIZE ($clog2(2)),
.PAYLOAD_FIFO_SIZE ($clog2(32)),
.MTU (MTU),
.CONTEXT_PREFETCH_EN (1)
) axis_pyld_ctxt_to_chdr_out_out_0 (
.axis_chdr_clk (rfnoc_chdr_clk),
.axis_chdr_rst (rfnoc_chdr_rst),
.axis_data_clk (axis_data_clk),
.axis_data_rst (axis_data_rst),
.m_axis_chdr_tdata (m_rfnoc_chdr_tdata[(0)*CHDR_W+:CHDR_W]),
.m_axis_chdr_tlast (m_rfnoc_chdr_tlast[0]),
.m_axis_chdr_tvalid (m_rfnoc_chdr_tvalid[0]),
.m_axis_chdr_tready (m_rfnoc_chdr_tready[0]),
.s_axis_payload_tdata (s_out_0_payload_tdata),
.s_axis_payload_tkeep (s_out_0_payload_tkeep),
.s_axis_payload_tlast (s_out_0_payload_tlast),
.s_axis_payload_tvalid (s_out_0_payload_tvalid),
.s_axis_payload_tready (s_out_0_payload_tready),
.s_axis_context_tdata (s_out_0_context_tdata),
.s_axis_context_tuser (s_out_0_context_tuser),
.s_axis_context_tlast (s_out_0_context_tlast),
.s_axis_context_tvalid (s_out_0_context_tvalid),
.s_axis_context_tready (s_out_0_context_tready),
.framer_errors (),
.flush_en (data_o_flush_en),
.flush_timeout (data_o_flush_timeout),
.flush_active (data_o_flush_active[0]),
.flush_done (data_o_flush_done[0])
);
endmodule // noc_shell_fft
`default_nettype wire
lib/rfnoc/blocks/rfnoc_block_fft/rfnoc_block_fft.v
+60 -103
View File
@@ -76,22 +76,16 @@ module rfnoc_block_fft #(
localparam ITEM_W = 32;
localparam NIPC = 1;
localparam NOC_ID = 32'hFF70_0000;
`include "../../core/rfnoc_axis_ctrl_utils.vh"
//---------------------------------------------------------------------------
// Signal Declarations
//---------------------------------------------------------------------------
wire rfnoc_chdr_rst;
wire ctrlport_req_wr;
wire ctrlport_req_rd;
wire [19:0] ctrlport_req_addr;
wire [31:0] ctrlport_req_data;
wire ctrlport_req_has_time;
wire [63:0] ctrlport_req_time;
wire ctrlport_resp_ack;
wire [31:0] ctrlport_resp_data;
@@ -119,106 +113,70 @@ module rfnoc_block_fft #(
wire ce_rst;
// Cross the CHDR reset to the radio_clk domain
pulse_synchronizer #(
.MODE ("POSEDGE")
) ctrl_rst_sync_i (
.clk_a (rfnoc_chdr_clk),
.rst_a (1'b0),
.pulse_a (rfnoc_chdr_rst),
.busy_a (),
.clk_b (ce_clk),
.pulse_b (ce_rst)
);
//---------------------------------------------------------------------------
// NoC Shell
//---------------------------------------------------------------------------
noc_shell_fft #(
.NOC_ID (NOC_ID ),
.THIS_PORTID (THIS_PORTID),
.CHDR_W (CHDR_W ),
.CTRLPORT_SLV_EN(0 ),
.CTRLPORT_MST_EN(1 ),
.SYNC_CLKS (0 ),
.NUM_DATA_I (1 ),
.NUM_DATA_O (1 ),
.ITEM_W (ITEM_W ),
.NIPC (NIPC ),
.PYLD_FIFO_SIZE (MTU ),
.CTXT_FIFO_SIZE (1 ),
.MTU (MTU )
.THIS_PORTID (THIS_PORTID),
.CHDR_W (CHDR_W ),
.MTU (MTU )
) noc_shell_fft_i (
.rfnoc_chdr_clk (rfnoc_chdr_clk ),
.rfnoc_chdr_rst (rfnoc_chdr_rst ),
.rfnoc_ctrl_clk (rfnoc_ctrl_clk ),
.rfnoc_ctrl_rst ( ),
.rfnoc_core_config (rfnoc_core_config ),
.rfnoc_core_status (rfnoc_core_status ),
.s_rfnoc_chdr_tdata (s_rfnoc_chdr_tdata ),
.s_rfnoc_chdr_tlast (s_rfnoc_chdr_tlast ),
.s_rfnoc_chdr_tvalid (s_rfnoc_chdr_tvalid ),
.s_rfnoc_chdr_tready (s_rfnoc_chdr_tready ),
.m_rfnoc_chdr_tdata (m_rfnoc_chdr_tdata ),
.m_rfnoc_chdr_tlast (m_rfnoc_chdr_tlast ),
.m_rfnoc_chdr_tvalid (m_rfnoc_chdr_tvalid ),
.m_rfnoc_chdr_tready (m_rfnoc_chdr_tready ),
.s_rfnoc_ctrl_tdata (s_rfnoc_ctrl_tdata ),
.s_rfnoc_ctrl_tlast (s_rfnoc_ctrl_tlast ),
.s_rfnoc_ctrl_tvalid (s_rfnoc_ctrl_tvalid ),
.s_rfnoc_ctrl_tready (s_rfnoc_ctrl_tready ),
.m_rfnoc_ctrl_tdata (m_rfnoc_ctrl_tdata ),
.m_rfnoc_ctrl_tlast (m_rfnoc_ctrl_tlast ),
.m_rfnoc_ctrl_tvalid (m_rfnoc_ctrl_tvalid ),
.m_rfnoc_ctrl_tready (m_rfnoc_ctrl_tready ),
.ctrlport_clk (ce_clk ),
.ctrlport_rst (ce_rst ),
.m_ctrlport_req_wr (ctrlport_req_wr ),
.m_ctrlport_req_rd (ctrlport_req_rd ),
.m_ctrlport_req_addr (ctrlport_req_addr ),
.m_ctrlport_req_data (ctrlport_req_data ),
.m_ctrlport_req_byte_en ( ),
.m_ctrlport_req_has_time (ctrlport_req_has_time),
.m_ctrlport_req_time (ctrlport_req_time ),
.m_ctrlport_resp_ack (ctrlport_resp_ack ),
.m_ctrlport_resp_status (AXIS_CTRL_STS_OKAY ),
.m_ctrlport_resp_data (ctrlport_resp_data ),
.s_ctrlport_req_wr (1'b0 ),
.s_ctrlport_req_rd (1'b0 ),
.s_ctrlport_req_addr (20'b0 ),
.s_ctrlport_req_portid (10'b0 ),
.s_ctrlport_req_rem_epid (16'b0 ),
.s_ctrlport_req_rem_portid(10'b0 ),
.s_ctrlport_req_data (32'b0 ),
.s_ctrlport_req_byte_en (4'b0 ),
.s_ctrlport_req_has_time (1'b0 ),
.s_ctrlport_req_time (64'b0 ),
.s_ctrlport_resp_ack ( ),
.s_ctrlport_resp_status ( ),
.s_ctrlport_resp_data ( ),
.axis_data_clk (ce_clk ),
.axis_data_rst (ce_rst ),
.m_axis_payload_tdata (axis_to_fft_tdata ),
.m_axis_payload_tkeep ( ),
.m_axis_payload_tlast (axis_to_fft_tlast ),
.m_axis_payload_tvalid (axis_to_fft_tvalid ),
.m_axis_payload_tready (axis_to_fft_tready ),
.s_axis_payload_tdata (axis_from_fft_tdata ),
.s_axis_payload_tkeep ({1*NIPC{1'b1}} ),
.s_axis_payload_tlast (axis_from_fft_tlast ),
.s_axis_payload_tvalid (axis_from_fft_tvalid ),
.s_axis_payload_tready (axis_from_fft_tready ),
.m_axis_context_tdata (m_axis_context_tdata ),
.m_axis_context_tuser (m_axis_context_tuser ),
.m_axis_context_tlast (m_axis_context_tlast ),
.m_axis_context_tvalid (m_axis_context_tvalid),
.m_axis_context_tready (m_axis_context_tready),
.s_axis_context_tdata (s_axis_context_tdata ),
.s_axis_context_tuser (s_axis_context_tuser ),
.s_axis_context_tlast (s_axis_context_tlast ),
.s_axis_context_tvalid (s_axis_context_tvalid),
.s_axis_context_tready (s_axis_context_tready)
.rfnoc_chdr_clk (rfnoc_chdr_clk ),
.rfnoc_ctrl_clk (rfnoc_ctrl_clk ),
.ce_clk (ce_clk ),
.rfnoc_chdr_rst ( ),
.rfnoc_ctrl_rst ( ),
.ce_rst (ce_rst ),
.rfnoc_core_config (rfnoc_core_config ),
.rfnoc_core_status (rfnoc_core_status ),
.s_rfnoc_chdr_tdata (s_rfnoc_chdr_tdata ),
.s_rfnoc_chdr_tlast (s_rfnoc_chdr_tlast ),
.s_rfnoc_chdr_tvalid (s_rfnoc_chdr_tvalid ),
.s_rfnoc_chdr_tready (s_rfnoc_chdr_tready ),
.m_rfnoc_chdr_tdata (m_rfnoc_chdr_tdata ),
.m_rfnoc_chdr_tlast (m_rfnoc_chdr_tlast ),
.m_rfnoc_chdr_tvalid (m_rfnoc_chdr_tvalid ),
.m_rfnoc_chdr_tready (m_rfnoc_chdr_tready ),
.s_rfnoc_ctrl_tdata (s_rfnoc_ctrl_tdata ),
.s_rfnoc_ctrl_tlast (s_rfnoc_ctrl_tlast ),
.s_rfnoc_ctrl_tvalid (s_rfnoc_ctrl_tvalid ),
.s_rfnoc_ctrl_tready (s_rfnoc_ctrl_tready ),
.m_rfnoc_ctrl_tdata (m_rfnoc_ctrl_tdata ),
.m_rfnoc_ctrl_tlast (m_rfnoc_ctrl_tlast ),
.m_rfnoc_ctrl_tvalid (m_rfnoc_ctrl_tvalid ),
.m_rfnoc_ctrl_tready (m_rfnoc_ctrl_tready ),
.ctrlport_clk ( ),
.ctrlport_rst ( ),
.m_ctrlport_req_wr (ctrlport_req_wr ),
.m_ctrlport_req_rd (ctrlport_req_rd ),
.m_ctrlport_req_addr (ctrlport_req_addr ),
.m_ctrlport_req_data (ctrlport_req_data ),
.m_ctrlport_resp_ack (ctrlport_resp_ack ),
.m_ctrlport_resp_data (ctrlport_resp_data ),
.axis_data_clk ( ),
.axis_data_rst ( ),
.m_in_0_payload_tdata (axis_to_fft_tdata ),
.m_in_0_payload_tkeep ( ),
.m_in_0_payload_tlast (axis_to_fft_tlast ),
.m_in_0_payload_tvalid (axis_to_fft_tvalid ),
.m_in_0_payload_tready (axis_to_fft_tready ),
.m_in_0_context_tdata (m_axis_context_tdata ),
.m_in_0_context_tuser (m_axis_context_tuser ),
.m_in_0_context_tlast (m_axis_context_tlast ),
.m_in_0_context_tvalid (m_axis_context_tvalid),
.m_in_0_context_tready (m_axis_context_tready),
.s_out_0_payload_tdata (axis_from_fft_tdata ),
.s_out_0_payload_tkeep ({1*NIPC{1'b1}} ),
.s_out_0_payload_tlast (axis_from_fft_tlast ),
.s_out_0_payload_tvalid (axis_from_fft_tvalid ),
.s_out_0_payload_tready (axis_from_fft_tready ),
.s_out_0_context_tdata (s_axis_context_tdata ),
.s_out_0_context_tuser (s_axis_context_tuser ),
.s_out_0_context_tlast (s_axis_context_tlast ),
.s_out_0_context_tvalid (s_axis_context_tvalid),
.s_out_0_context_tready (s_axis_context_tready)
);
// The input packets are the same configuration as the output packets, so
@@ -233,7 +191,6 @@ module rfnoc_block_fft #(
wire [ 8-1:0] set_addr;
wire [32-1:0] set_data;
wire set_has_time;
wire set_stb;
wire [ 8-1:0] rb_addr;
reg [64-1:0] rb_data;
@@ -247,15 +204,15 @@ module rfnoc_block_fft #(
.s_ctrlport_req_rd (ctrlport_req_rd),
.s_ctrlport_req_addr (ctrlport_req_addr),
.s_ctrlport_req_data (ctrlport_req_data),
.s_ctrlport_req_has_time (ctrlport_req_has_time),
.s_ctrlport_req_time (ctrlport_req_time),
.s_ctrlport_req_has_time (1'b0),
.s_ctrlport_req_time (64'b0),
.s_ctrlport_resp_ack (ctrlport_resp_ack),
.s_ctrlport_resp_data (ctrlport_resp_data),
.set_data (set_data),
.set_addr (set_addr),
.set_stb (set_stb),
.set_time (),
.set_has_time (set_has_time),
.set_has_time (),
.rb_stb (1'b1),
.rb_addr (rb_addr),
.rb_data (rb_data));
lib/rfnoc/blocks/rfnoc_block_fft/rfnoc_block_fft_tb.sv
+2 -1
View File
@@ -28,6 +28,7 @@ module rfnoc_block_fft_tb();
localparam int STALL_PROB = 25; // BFM stall probability
// Block configuration
localparam int NOC_ID = 32'hFF70_0000;
localparam int CHDR_W = 64;
localparam int THIS_PORTID = 'h123;
localparam int MTU = 10;
@@ -222,7 +223,7 @@ module rfnoc_block_fft_tb();
//-------------------------------------------------------------------------
test.start_test("Verify Block Info", 2us);
`ASSERT_ERROR(blk_ctrl.get_noc_id() == DUT.NOC_ID, "Incorrect NOC_ID Value");
`ASSERT_ERROR(blk_ctrl.get_noc_id() == NOC_ID, "Incorrect NOC_ID Value");
`ASSERT_ERROR(blk_ctrl.get_num_data_i() == NUM_PORTS, "Incorrect NUM_DATA_I Value");
`ASSERT_ERROR(blk_ctrl.get_num_data_o() == NUM_PORTS, "Incorrect NUM_DATA_O Value");
`ASSERT_ERROR(blk_ctrl.get_mtu() == MTU, "Incorrect MTU Value");