fpga: e320: Cleanup MTU parameters

Original-commit: a6a76002ead284815d9337e30c50f590466eb429
2022-09-01 14:41:55 -05:00
parent 2f677eddda
commit 521c7684fc
3 changed files with 13 additions and 1 deletions
@@ -26,6 +26,7 @@ module e320_core #(
  parameter FP_GPIO_WIDTH = 8,  // Front panel GPIO width
  parameter DB_GPIO_WIDTH = 16,  // Daughterboard GPIO width
  parameter CHDR_W = 64,
+  parameter BYTE_MTU = $clog2(8192),
  parameter RFNOC_PROTOVER  = {8'd1, 8'd0}
 )(
  // Clocks and resets
@@ -1029,6 +1030,7 @@ module e320_core #(

  rfnoc_image_core #(
    .CHDR_W   (CHDR_W),
+    .MTU      (BYTE_MTU - $clog2(CHDR_W/8)),
    .PROTOVER (RFNOC_PROTOVER)
  ) rfnoc_sandbox_i (
    .chdr_aclk               (bus_clk    ),