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fpga: x400: Connect Radio Blocks to DIO

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Original-commit: 87b2cf09301e90dfaf2a6554c424b62e0558e0b1
This commit is contained in:
Javier Valenzuela
2022-01-25 10:18:47 -07:00
committed by Wade Fife
parent 729d780bd4
commit 4edae39d9e
11 changed files with 627 additions and 232 deletions
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top/x400/regmap/radio_ctrlport_regmap_utils.vh
+10 -5
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@@ -11,8 +11,9 @@
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// DB_WINDOW : 0x0 (rfdc_timing_control.v)
// RFDC_TIMING_WINDOW : 0x8000 (rfdc_timing_control.v)
// DB_WINDOW : 0x0 (x4xx_core_common.v)
// RFDC_TIMING_WINDOW : 0x8000 (x4xx_core_common.v)
// DIO_WINDOW : 0xC000 (x4xx_core_common.v)
//===============================================================================
// RegTypes
@@ -22,10 +23,14 @@
// Register Group RADIO_CTRLPORT_WINDOWS
//===============================================================================
// DB_WINDOW Window (from rfdc_timing_control.v)
// DB_WINDOW Window (from x4xx_core_common.v)
localparam DB_WINDOW = 'h0; // Window Offset
localparam DB_WINDOW_SIZE = 'h8000; // size in bytes
// RFDC_TIMING_WINDOW Window (from rfdc_timing_control.v)
// RFDC_TIMING_WINDOW Window (from x4xx_core_common.v)
localparam RFDC_TIMING_WINDOW = 'h8000; // Window Offset
localparam RFDC_TIMING_WINDOW_SIZE = 'h8000; // size in bytes
localparam RFDC_TIMING_WINDOW_SIZE = 'h4000; // size in bytes
// DIO_WINDOW Window (from x4xx_core_common.v)
localparam DIO_WINDOW = 'hC000; // Window Offset
localparam DIO_WINDOW_SIZE = 'h4000; // size in bytes
top/x400/regmap/versioning_regs_regmap_utils.vh
+2 -2
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@@ -82,10 +82,10 @@
localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
localparam FPGA_CURRENT_VERSION_MINOR = 'h3; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MINOR = 'h4; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MAJOR = 'h7; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h7; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h21041616; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h21081116; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
// Enumerated type RF_CORE_100M_VERSION
localparam RF_CORE_100M_VERSION_SIZE = 7;