From 4b93935967de99aba1150e3713c8d27117044390 Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Thu, 5 Sep 2024 22:32:58 -0500 Subject: [PATCH] fpga: x400: Make DTS output match bitstream name Original-commit: 2afc66f1325632a4bc0635217feefe666225f4e8 --- top/e31x/Makefile | 10 +++++----- top/e320/Makefile | 8 ++++---- top/n3xx/Makefile | 38 +++++++++++++++++++------------------- top/x400/Makefile | 9 ++++++--- 4 files changed, 34 insertions(+), 31 deletions(-) diff --git a/top/e31x/Makefile b/top/e31x/Makefile index 402da76..f4319d8 100644 --- a/top/e31x/Makefile +++ b/top/e31x/Makefile @@ -91,26 +91,26 @@ ifndef BUILD_DIR endif ##E310_SG1_IDLE: Build USRP E3XX idle design (Speed Grade 1). -E310_SG1_IDLE E3XX_idle: check-variables E310_SG1_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg1_idle_fpga.dts +E310_SG1_IDLE E3XX_idle: check-variables E310_SG1_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E310_SG1,$(DEFS) E310_IDLE_IMAGE=1 E310_SG1=1) $(call post_build,$@) ##E310_SG3_IDLE: Build USRP E3XX idle design (Speed Grade 3). -E310_SG3_IDLE E3XX_idle_sg3: check-variables E310_SG3_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg3_idle_fpga.dts +E310_SG3_IDLE E3XX_idle_sg3: check-variables E310_SG3_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E310_SG3,$(DEFS) E310_IDLE_IMAGE=1 E310_SG3=1) $(call post_build,$@) ##E310_SG1: Build USRP E3XX (Speed Grade 1). -E310_SG1 E310: check-variables E310_SG1_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg1_fpga.dts +E310_SG1 E310: check-variables E310_SG1_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E310_SG1,$(DEFS) E310_SG1=1 $(if $(DRAM),ENABLE_DRAM=1,)) $(call post_build,$@) ##E310_SG3: Build USRP E3XX (Speed Grade 3). -E310_SG3 E310_sg3: check-variables E310_SG3_IP $(BUILD_OUTPUT_DIR)/usrp_e310_sg3_fpga.dts +E310_SG3 E310_sg3: check-variables E310_SG3_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E310_SG3,$(DEFS) E310_SG3=1 $(if $(DRAM),ENABLE_DRAM=1,)) $(call post_build,$@) -$(BUILD_OUTPUT_DIR)/%.dts: dts/%.dts dts/*.dtsi +$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi -mkdir -p $(BUILD_OUTPUT_DIR) ${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $< diff --git a/top/e320/Makefile b/top/e320/Makefile index 550954d..81f2dda 100644 --- a/top/e320/Makefile +++ b/top/e320/Makefile @@ -91,21 +91,21 @@ ifndef BUILD_DIR endif ##E320_1G: 1GigE on SFP+ Port. -E320_1G: check-variables E320_IP $(BUILD_OUTPUT_DIR)/usrp_e320_fpga_1G.dts +E320_1G: check-variables E320_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E320,$(1G_DEFS) E320=1) $(call post_build,E320_1G) ##E320_XG: 10GigE on SFP+ Port. -E320_XG: check-variables E320_IP $(BUILD_OUTPUT_DIR)/usrp_e320_fpga_XG.dts +E320_XG: check-variables E320_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E320,$(XG_DEFS) E320=1) $(call post_build,E320_XG) ##E320_AA: Aurora on SFP+ Port. -E320_AA: check-variables E320_IP $(BUILD_OUTPUT_DIR)/usrp_e320_fpga_AA.dts +E320_AA: check-variables E320_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,E320,$(AA_DEFS) E320=1) $(call post_build,E320_AA) -$(BUILD_OUTPUT_DIR)/%.dts: dts/%.dts dts/*.dtsi +$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi -mkdir -p $(BUILD_OUTPUT_DIR) ${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $< diff --git a/top/n3xx/Makefile b/top/n3xx/Makefile index c6bbb7c..00c6e21 100644 --- a/top/n3xx/Makefile +++ b/top/n3xx/Makefile @@ -122,96 +122,96 @@ ifndef BUILD_DIR endif ##N310_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1. -N310_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_WX.dts +N310_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(WX_DEFS) N310=1,$(N310_DEFAULTS)) $(call post_build,N310,WX) ##N310_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N310_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HG.dts +N310_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(HG_DEFS) N310=1,$(N310_DEFAULTS)) $(call post_build,N310,HG) ##N310_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N310_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XG.dts +N310_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(XG_DEFS) N310=1,$(N310_DEFAULTS)) $(call post_build,N310,XG) ##N310_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1. -N310_HA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_HA.dts +N310_HA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(HA_DEFS) N310=1,$(N310_DEFAULTS)) $(call post_build,N310,HA) ##N310_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1. -N310_XA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_XA.dts +N310_XA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(XA_DEFS) N310=1,$(N310_DEFAULTS)) $(call post_build,N310,XA) ##N310_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1. -N310_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n310_fpga_AA.dts +N310_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N310,$(AA_DEFS) N310=1,$(N310AA_DEFAULTS)) $(call post_build,N310,AA) ##N300_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1. -N300_WX: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_WX.dts +N300_WX: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(WX_DEFS) N300=1,$(N300_DEFAULTS)) $(call post_build,N300,WX) ##N300_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N300_HG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HG.dts +N300_HG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(HG_DEFS) N300=1,$(N300_DEFAULTS)) $(call post_build,N300,HG) ##N300_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N300_XG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XG.dts +N300_XG: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(XG_DEFS) N300=1,$(N300_DEFAULTS)) $(call post_build,N300,XG) ##N300_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1. -N300_HA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_HA.dts +N300_HA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(HA_DEFS) N300=1,$(N300_DEFAULTS)) $(call post_build,N300,HA) ##N300_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1. -N300_XA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_XA.dts +N300_XA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(XA_DEFS) N300=1,$(N300_DEFAULTS)) $(call post_build,N300,XA) ##N300_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1. -N300_AA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/usrp_n300_fpga_AA.dts +N300_AA: check-variables N300_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N300,$(AA_DEFS) N300=1,$(N300AA_DEFAULTS)) $(call post_build,N300,AA) ##N320_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1. -N320_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_WX.dts +N320_WX: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(WX_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,WX) ##N320_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N320_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_HG.dts +N320_HG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(HG_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,HG) ##N320_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1. -N320_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XG.dts +N320_XG: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(XG_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,XG) ##N320_XQ: WR on SFP+ Port0, 10Gig on QSFP+ Port0,1. -N320_XQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_XQ.dts +N320_XQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(XQ_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,XQ) ##N320_AQ: 10Gig on SFP+ Port0,1 Aurora on QSFP+ Port0,1,2,3. -N320_AQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AQ.dts +N320_AQ: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(AQ_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,AQ) ##N320_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1. -N320_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/usrp_n320_fpga_AA.dts +N320_AA: check-variables N3X0_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts $(call vivado_build,N320,$(AA_DEFS) N320=1,$(N320AA_DEFAULTS)) $(call post_build,N320,AA) -$(BUILD_OUTPUT_DIR)/%.dts: dts/%.dts dts/*.dtsi +$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi -mkdir -p $(BUILD_OUTPUT_DIR) ${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $< diff --git a/top/x400/Makefile b/top/x400/Makefile index a3e618a..cca0da3 100644 --- a/top/x400/Makefile +++ b/top/x400/Makefile @@ -132,7 +132,8 @@ X410_IP: ##Build X410 IP only. Use the -j option to build multiple IP block X440_IP: ##Build X440 IP only. Use the -j option to build multiple IP blocks simultaneously. +$(call vivado_ip,X440,$(DEFS) X440=1) -$(BUILD_OUTPUT_DIR)/usrp_x410%.dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts +ifeq ($(MAKECMDGOALS),X410) +$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts -mkdir -p $(BUILD_OUTPUT_DIR) tools/parse_versions_for_dts.py \ --input regmap/x410/versioning_regs_regmap_utils.vh \ @@ -140,8 +141,9 @@ $(BUILD_OUTPUT_DIR)/usrp_x410%.dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tre --components fpga,cpld_ifc,db_gpio_ifc,rf_core_100m,rf_core_400m ${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ \ $(BUILD_DIR)/device_tree.dts - -$(BUILD_OUTPUT_DIR)/usrp_x440%.dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts +endif +ifeq ($(MAKECMDGOALS),X440) +$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts -mkdir -p $(BUILD_OUTPUT_DIR) tools/parse_versions_for_dts.py \ --input regmap/x440/versioning_regs_regmap_utils.vh \ @@ -149,6 +151,7 @@ $(BUILD_OUTPUT_DIR)/usrp_x440%.dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tre --components fpga,cpld_ifc,db_gpio_ifc,rf_core_full ${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ \ $(BUILD_DIR)/device_tree.dts +endif clean: ##Clean up all target build outputs. @echo "Cleaning targets..."