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fpga: x400: Refactor CPLDs build process

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This commit refactors the X410's CPLDs build process to make it similar to other
FPGA targets within the repo. The new process relies on basic Quartus build
utilities.
Additionally, this commit adds support for an alternative MAX10 CPLD for the
motherboard CPLD implementation. Both previous (10M04) and new variant
(10M08) are supported concurrently. The images package mapping is updated to
reflect these changes.


Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
This commit is contained in:
Humberto Jimenez
2021-12-01 10:51:07 -06:00
committed by Wade Fife
parent 119abe6800
commit 4082066a6f
34 changed files with 739 additions and 256 deletions
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top/x400/doc/X4XX_FPGA_right.htm
+56 -12
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@@ -2338,9 +2338,9 @@ This enumeration is used to create the constants held in the basic registers.
<tr valign="top">
<td class='value'>553721877</td>
<td class='value'>554767892</td>
<td class='l'>0x21012015</td>
<td class='l'>0x21111614</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='CONSTANTS_REGMAP|CONSTANTS_ENUM|CPLD_REVISION'></a>CPLD_REVISION</p>
@@ -14556,10 +14556,12 @@ RFDC timing control interface.
<a name="RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM"></a>
<h3 class="enum">FLASH_PRIMARY_IMAGE_ADDR_ENUM Enumeration</h3>
Those values are the start and end address of the CFM image flash
sector from Intel's On-Chip Flash IP Generator. Note that the values
given in the IP generator are byte based where the values of this enum
are U32 based (divided by 4).
These values are the start and end address of the CFM image flash
sector from Intel's On-Chip Flash IP Generator.
Be aware that three different values exist per each of the two
supported MAX10 variants: 10M04 and 10M08
Note that the values given in the IP generator are byte based where
the values of this enum are U32 based (divided by 4).
<table class="enum" border="0" cellspacing="0" cellpadding="0">
<tr class="header" valign="center">
@@ -14583,7 +14585,20 @@ Those values are the start and end address of the CFM image flash
<td class='l'>0x01000</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT</p>
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04</p>
</td>
</tr>
<tr valign="top">
<td class='value'>8192</td>
<td class='l'>0x02000</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08</p>
</td>
@@ -14596,7 +14611,20 @@ Those values are the start and end address of the CFM image flash
<td class='l'>0x09C00</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR'></a>FLASH_PRIMARY_IMAGE_START_ADDR</p>
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_10M04'></a>FLASH_PRIMARY_IMAGE_START_ADDR_10M04</p>
</td>
</tr>
<tr valign="top">
<td class='value'>44032</td>
<td class='l'>0x0AC00</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_10M08'></a>FLASH_PRIMARY_IMAGE_START_ADDR_10M08</p>
</td>
@@ -14609,7 +14637,20 @@ Those values are the start and end address of the CFM image flash
<td class='l'>0x127FF</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR'></a>FLASH_PRIMARY_IMAGE_END_ADDR</p>
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR_10M04'></a>FLASH_PRIMARY_IMAGE_END_ADDR_10M04</p>
</td>
</tr>
<tr valign="top">
<td class='value'>79871</td>
<td class='l'>0x137FF</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR_10M08'></a>FLASH_PRIMARY_IMAGE_END_ADDR_10M08</p>
</td>
@@ -14999,9 +15040,12 @@ Total Offset =</td></tr>
<p>Defines the sector to be erased. Has to be set latest with the
write access which starts the erase operation by strobing
<a href="#RECONFIG_REGMAP|FLASH_CONTROL_REG|FLASH_ERASE_STB">FLASH_ERASE_STB</a>.<br>
If the flash is configured to support memory initialization (see
<a href="#RECONFIG_REGMAP|FLASH_STATUS_REG|FLASH_MEM_INIT_ENABLED">FLASH_MEM_INIT_ENABLED</a> flag) the sectors 2 to 4 have to be erased.
If the flag is not asserted only sector 4 has to be erased.</p>
With 10M04 variants, if the flash is configured to support memory
initialization (see <a href="#RECONFIG_REGMAP|FLASH_STATUS_REG|FLASH_MEM_INIT_ENABLED">FLASH_MEM_INIT_ENABLED</a> flag) the sectors 2
to 4 have to be erased. If the flag is not asserted only sector 4
has to be erased.
With 10M08 variants, the sectors to be erased are 3 to 5 when
using memory initialization or only sector 5 otherwise.</p>
</td>
</tr>