fpga: x400: Refactor CPLDs build process
This commit refactors the X410's CPLDs build process to make it similar to other FPGA targets within the repo. The new process relies on basic Quartus build utilities. Additionally, this commit adds support for an alternative MAX10 CPLD for the motherboard CPLD implementation. Both previous (10M04) and new variant (10M08) are supported concurrently. The images package mapping is updated to reflect these changes. Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
This commit is contained in:
Humberto Jimenez
committed by
Wade Fife
Wade Fife
parent
119abe6800
commit
4082066a6f
+83
-63
@@ -4,74 +4,94 @@
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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GIT_HASH = $(shell ../../../tools/scripts/git-hash.sh)
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# NOTE: All comments prefixed with a "##" will be displayed as a part of the "make help" target
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##-------------------
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##USRP X410 CPLD Help
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##-------------------
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##Usage:
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## make <Targets> <Options>
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##
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##Output:
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## build/<device-id>/usrp_x410_cpld.pof: Bitstream to use with JTAG programmer
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## build/<device-id>/usrp_x410_cpld.svf: Bitstream to use with PS JTAG engine (background programming)
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## build/<device-id>/usrp_x410_cpld.rpd: Bitstream to use via reconfig engine
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## build/<device-id>/usrp_x410_cpld_isp_off.svf: Bitstream to use with JTAG test points (initial programming)
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build: ip
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@echo -ne "\n---- Make: Synthesis ...\n\n";
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@quartus_map mb_cpld --verilog_macro="GIT_HASH=32'h$(GIT_HASH)";
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@echo -ne "\n---- Make: Partition Merge ...\n\n";
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@quartus_cdb mb_cpld --merge=on --incremental_compilation_import
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@echo -ne "\n\n---- Make: Implementation ...\n\n";
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@quartus_fit mb_cpld;
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@echo -ne "\n\n---- Make: Analyzing timing ...\n\n";
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@quartus_sta mb_cpld;
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@# grep for unconstrained path warning
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@grep "332102" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# grep for timing closure critical warning
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@grep "332148" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# expect no warnings
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@grep -iw "warning" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# expect no critical warning except "review power analyzer report file"
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@grep -i "critical warning" output_files/* | grep -v 16562; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# PS chip select analysis
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@quartus_sta -t scripts/ps_cs_analysis.tcl
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@echo -ne "\n\n---- Make: Generating bitfile...\n\n";
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@quartus_asm mb_cpld;
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@echo -ne "\n\n---- Make: Converting bitfile to svf format (ISP enabled)...\n\n";
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@quartus_cpf --convert \
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--frequency 10.0MHz \
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--voltage 2.5 \
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--operation p \
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./output_files/mb_cpld.pof ./output_files/mb_cpld_isp_on.svf -o background_programming=on;
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@echo -ne "\n\n---- Make: Converting bitfile to svf format (ISP disabled)...\n\n";
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@quartus_cpf --convert \
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--frequency 10.0MHz \
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--voltage 2.5 \
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--operation p \
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./output_files/mb_cpld.pof ./output_files/mb_cpld_isp_off.svf;
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@echo -ne "\n\n---- Make: Converting bitfile to rdp format...\n\n";
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@quartus_cpf -c raw_conversion.cof
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@echo -ne "\n\n---- Make: Copy final files...\n\n";
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@mkdir -p build
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@cp output_files/mb_cpld.pof build/usrp_x410_cpld.pof
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@cp output_files/mb_cpld_isp_off.svf build/usrp_x410_cpld_isp_off.svf
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@cp output_files/mb_cpld_isp_on.svf build/usrp_x410_cpld.svf
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@cp output_files/mb_cpld_converted_cfm0_auto.rpd build/usrp_x410_cpld.rpd
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@echo -ne "\n\n---- Make: MB CPLD ready!\n";
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@echo -ne " Use build/usrp_x410_cpld.pof via JTAG programmer or\n"
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@echo -ne " build/usrp_x410_cpld.svf (ISP on) via PS JTAG-engine (background programming) or\n"
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@echo -ne " build/usrp_x410_cpld.rpd via reconfig engine or\n"
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@echo -ne " build/usrp_x410_cpld_isp_off.svf via JTAG test points (initial programming)\n"
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# Definitions
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10M04_ID = "10M04SAU169I7G"
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10M08_ID = "10M08SAU169I7G"
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clean:
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@echo -ne "\nCleaning MB CPLD...\n";
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# Target specific variables
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X410_CPLD_10M04: DEFS = VARIANT_`echo $(10M04_ID) | cut -c1-5`=1
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X410_CPLD_10M08: DEFS = VARIANT_`echo $(10M08_ID) | cut -c1-5`=1
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TARGET = bin
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TOP ?= mb_cpld
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# quartus_build($1=Device, $2=Definitions)
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quartus_build = make -f Makefile.cpld.inc $(TARGET) NAME=$@ ARCH="MAX10" PART_ID="$1" $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2" POST_STA_TCL="ps_cs_analysis.tcl"
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# quartus_ip($1=Device, $2=Definitions)
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quartus_ip = make -f Makefile.cpld.inc quar_ip NAME=$@ ARCH="MAX10" PART_ID="$1" $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2"
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# post_build($1=Artifact Name)
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ifeq ($(TARGET),bin)
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post_build = @\
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mkdir -p build/; \
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echo "Exporting bitstream files..."; \
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cp build-$@/output_files/$(TOP).pof build/$(1).pof; \
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cp build-$@/output_files/$(TOP)_isp_off.svf build/$(1)_isp_off.svf; \
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cp build-$@/output_files/$(TOP)_isp_on.svf build/$(1).svf; \
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cp build-$@/output_files/$(TOP)_converted_cfm0_auto.rpd build/$(1).rpd; \
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echo -ne "\n\n---- Make: MB CPLD ready!\n"; \
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echo -ne " Use build/$(1).pof via JTAG programmer or\n"; \
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echo -ne " build/$(1).svf (ISP on) via PS JTAG-engine (background programming) or\n"; \
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echo -ne " build/$(1).rpd via reconfig engine or\n"; \
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echo -ne " build/$(1)_isp_off.svf via JTAG test points (initial programming)\n";
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else
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post_build = @echo "Skipping bitfile export."
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endif
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##
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##Supported Targets
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##-----------------
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all: X410_CPLD_10M04 X410_CPLD_10M08 ##(Default target)
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##X410_CPLD_10M04: Motherboard CPLD targeted to 10M04SAU169I7G.
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X410_CPLD_10M04:
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$(call quartus_build,$(10M04_ID),$(DEFS))
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$(call post_build,"usrp_x410_cpld_`echo $(10M04_ID) | cut -c1-5 | tr A-Z a-z`")
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##X410_CPLD_10M08: Motherboard CPLD targeted to 10M08SAU169I7G.
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X410_CPLD_10M08:
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$(call quartus_build,$(10M08_ID),$(DEFS))
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$(call post_build,"usrp_x410_cpld_`echo $(10M08_ID) | cut -c1-5 | tr A-Z a-z`")
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X410_CPLD_IP: ##Build IPs only, needed for simulation.
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@# Building only X410_CPLD_10M04 IP
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$(call quartus_ip,$(10M04_ID),$(DEFS))
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clean: ##Clean up all target build outputs.
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@echo -ne "\nCleaning targets and git repo...\n";
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@rm -rf build-X410_CPLD*
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@rm -rf build
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@git clean -Xdf
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QSYS_PATH=$(subst \,/,$(QSYS_ROOTDIR))
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cleanall: ##Clean up all target and ip build outputs.
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@echo -ne "\nCleaning targets, IP, and git repo...\n";
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@rm -rf build-X410_CPLD*
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@rm -rf build
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@rm -rf build-ip
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@git clean -Xdf
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ip: ip/flash/on_chip_flash/simulation/on_chip_flash.v \
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ip/clkctrl/clkctrl/simulation/clkctrl.v
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help: ##Show this help message.
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@grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//'
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ip/flash/on_chip_flash/simulation/on_chip_flash.v:
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$(QSYS_PATH)/qsys-generate ip/flash/on_chip_flash.qsys --simulation=VERILOG
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ip/clkctrl/clkctrl/simulation/clkctrl.v:
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$(QSYS_PATH)/qsys-generate ip/clkctrl/clkctrl.qsys --simulation=VERILOG
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all: build
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##
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##Supported Options
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##-----------------
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##
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.PHONY: all build clean ip
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