From 3c4c049943644dba7412dd7db2a5e29218cf0bce Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Fri, 10 Sep 2021 15:50:13 -0500 Subject: [PATCH] fpga: n3xx: Update synchronizer constraint Original-commit: ab4b0c6e0eacbc68df3f211ce27790b1cfbc002f --- top/n3xx/mb_timing.xdc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/top/n3xx/mb_timing.xdc b/top/n3xx/mb_timing.xdc index 6aa3f81..95265ac 100644 --- a/top/n3xx/mb_timing.xdc +++ b/top/n3xx/mb_timing.xdc @@ -106,6 +106,5 @@ set_max_delay -from $PORT_LIST 50.000 set_min_delay -from $PORT_LIST 0.000 #****************************************************************************** -## Reset Sync False Path -set_false_path -to [get_pins */synchronizer_false_path/stages[0].value_reg[0]/D] -set_false_path -to [get_pins */synchronizer_false_path/stages[0].value_reg[0]/C] +## Synchronizer false paths +set_false_path -to [get_pins -hierarchical -filter {NAME =~ */synchronizer_false_path/stages[0].value_reg[0][*]/D}]