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fpga: tools: Add support for Questa

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Original-commit: 247f9fd2ac8b0a9905a9b587caf9d57b6bacd82a
This commit is contained in:
Wade Fife
2025-03-17 13:40:26 -05:00
parent c499cad53d
commit 37fb9138cd
4 changed files with 179 additions and 73 deletions
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tools/scripts/launch_modelsim.sh
+20 -7
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@@ -45,12 +45,10 @@ function print_color {
SCRIPT_DIR=$(dirname "$(realpath "$0")")
# Using -voptargs=+acc makes everything visible in the simulator for GUI mode
# and avoids some cases where simulation mismatch could otherwise occur.
# Setting -onfinish to "stop" prevents the simulator from immediately trying to
# exit when finish() is called. This is annoying in the GUI and important for
# error detection in batch mode.
MSIM_DEFAULT="-voptargs=+acc -quiet -L unisims_ver -onfinish stop"
MSIM_DEFAULT="-quiet -L unisims_ver -onfinish stop"
# Use specified modelsim.ini, if set
if [[ -z $MSIM_MODELSIM_INI ]]; then
@@ -69,15 +67,30 @@ do
done
if [ $MSIM_MODE == "gui" ]; then
echo "* Launching ModelSim"
vsim $MSIM_DEFAULT $MODELSIMINI_ARG $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
if [ $MSIM_VARIANT == "questa" ]; then
echo "* Launching Visualizer GUI"
MSIM_DEFAULT+=" -voptargs=\"-debug,events,livesim +designfile\" -visualizer -qwavedb=+signal+memory+vhdlvariable+class"
else
echo "* Launching classic GUI"
MSIM_DEFAULT+=" -voptargs=+acc"
fi
# Use stdbuf to line buffer the pipe and avoid long block buffering delays
stdbuf -oL -eL vsim $MSIM_DEFAULT $MODELSIMINI_ARG $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
print_color $line
done
exit_status=${PIPESTATUS[0]}
if [ ${exit_status} -ne 0 ]; then exit ${exit_status}; fi
elif [ $MSIM_MODE == "batch" ]; then
echo "* Launching ModelSim"
vsim -batch -do $SCRIPT_DIR/modelsim.do $MODELSIMINI_ARG $MSIM_DEFAULT $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
if [ $MSIM_VARIANT == "questa" ]; then
echo "* Launching Questa batch mode"
else
echo "* Launching ModelSim batch mode"
# Using +acc for GUI and batch sim ensures we get the same behavior in
# both, with the downside that simulation might be slower.
MSIM_DEFAULT+=" -voptargs=+acc"
fi
# Use stdbuf to line buffer the pipe and avoid long block buffering delays
stdbuf -oL -eL vsim -batch -do $SCRIPT_DIR/modelsim.do $MODELSIMINI_ARG $MSIM_DEFAULT $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
print_color $line
done
exit_status=${PIPESTATUS[0]}