From 324f9d3c9aa47a3a5a6c3165a9413f9ff906cd92 Mon Sep 17 00:00:00 2001
From: Martin Braun <martin.braun@ettus.com>
Date: Fri, 14 Aug 2020 10:20:55 +0200
Subject: [PATCH] fpga: e320: Fix default YAML target to E320_1G

It was set to E320_HG, which is not a valid target, causing build errors
unless -t E320_1G was provided to rfnoc_image_builder.


Original-commit: 9ed42affcaa88e026cb4f82807e69b546ed30c8c
---
 top/e320/e320_rfnoc_image_core.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/top/e320/e320_rfnoc_image_core.yml b/top/e320/e320_rfnoc_image_core.yml
index 626bba4..57234c1 100644
--- a/top/e320/e320_rfnoc_image_core.yml
+++ b/top/e320/e320_rfnoc_image_core.yml
@@ -7,7 +7,7 @@ version: 1.0                            # File version
 rfnoc_version: 1.0                      # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'e320'
-default_target: 'E320_HG'
+default_target: 'E320_1G'