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fpga: x400: bump minor revision

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Original-commit: e7ff54284ce7b8279b434867640d6374dc1f3a2b
This commit is contained in:
Javier Valenzuela
2023-10-25 14:14:48 -05:00
committed by Aki Tomita
parent ddbff804ed
commit 2f83ebb435
5 changed files with 21 additions and 21 deletions
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top/x400/doc/X410/X410_FPGA_right.htm
+6 -6
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@@ -25134,9 +25134,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>1</td> <td class='value'>2</td>
<td class='l'>0x00000001</td> <td class='l'>0x00000002</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_CURRENT_VERSION_MINOR'></a>FPGA_CURRENT_VERSION_MINOR</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_CURRENT_VERSION_MINOR'></a>FPGA_CURRENT_VERSION_MINOR</p>
@@ -25147,9 +25147,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>1</td> <td class='value'>2</td>
<td class='l'>0x00000001</td> <td class='l'>0x00000002</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_OLDEST_COMPATIBLE_VERSION_MINOR'></a>FPGA_OLDEST_COMPATIBLE_VERSION_MINOR</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_OLDEST_COMPATIBLE_VERSION_MINOR'></a>FPGA_OLDEST_COMPATIBLE_VERSION_MINOR</p>
@@ -25186,9 +25186,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>587801865</td> <td class='value'>588260368</td>
<td class='l'>0x23092509</td> <td class='l'>0x23102410</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_VERSION_LAST_MODIFIED_TIME'></a>FPGA_VERSION_LAST_MODIFIED_TIME</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_VERSION_LAST_MODIFIED_TIME'></a>FPGA_VERSION_LAST_MODIFIED_TIME</p>
top/x400/doc/X440/X440_FPGA_right.htm
+6 -6
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@@ -29055,9 +29055,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>1</td> <td class='value'>2</td>
<td class='l'>0x00000001</td> <td class='l'>0x00000002</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_CURRENT_VERSION_MINOR'></a>FPGA_CURRENT_VERSION_MINOR</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_CURRENT_VERSION_MINOR'></a>FPGA_CURRENT_VERSION_MINOR</p>
@@ -29068,9 +29068,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>1</td> <td class='value'>2</td>
<td class='l'>0x00000001</td> <td class='l'>0x00000002</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_OLDEST_COMPATIBLE_VERSION_MINOR'></a>FPGA_OLDEST_COMPATIBLE_VERSION_MINOR</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_OLDEST_COMPATIBLE_VERSION_MINOR'></a>FPGA_OLDEST_COMPATIBLE_VERSION_MINOR</p>
@@ -29107,9 +29107,9 @@ FPGA version.<BR/>
<tr valign="top"> <tr valign="top">
<td class='value'>587801865</td> <td class='value'>588260368</td>
<td class='l'>0x23092509</td> <td class='l'>0x23102410</td>
<td class="l" style="text-align: left;"> <td class="l" style="text-align: left;">
<p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_VERSION_LAST_MODIFIED_TIME'></a>FPGA_VERSION_LAST_MODIFIED_TIME</p> <p class="name"><a name='VERSIONING_REGS_REGMAP|FPGA_VERSION|FPGA_VERSION_LAST_MODIFIED_TIME'></a>FPGA_VERSION_LAST_MODIFIED_TIME</p>
top/x400/regmap/x410/versioning_regs_regmap_utils.vh
+3 -3
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@@ -81,11 +81,11 @@
localparam FPGA_VERSION_SIZE = 7; localparam FPGA_VERSION_SIZE = 7;
localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
localparam FPGA_CURRENT_VERSION_MINOR = 'h1; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR localparam FPGA_CURRENT_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h1; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23092509; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23102410; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
// Enumerated type RF_CORE_100M_VERSION // Enumerated type RF_CORE_100M_VERSION
localparam RF_CORE_100M_VERSION_SIZE = 7; localparam RF_CORE_100M_VERSION_SIZE = 7;
top/x400/regmap/x440/versioning_regs_regmap_utils.vh
+3 -3
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@@ -81,11 +81,11 @@
localparam FPGA_VERSION_SIZE = 7; localparam FPGA_VERSION_SIZE = 7;
localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
localparam FPGA_CURRENT_VERSION_MINOR = 'h1; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR localparam FPGA_CURRENT_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h1; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23092509; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23102410; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
// Enumerated type RF_CORE_FULL_VERSION // Enumerated type RF_CORE_FULL_VERSION
localparam RF_CORE_FULL_VERSION_SIZE = 7; localparam RF_CORE_FULL_VERSION_SIZE = 7;
top/x400/x4xx.v
+3 -3
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@@ -3252,12 +3252,12 @@ endmodule
// <li> Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED // <li> Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED
// </info> // </info>
// <value name="FPGA_CURRENT_VERSION_MAJOR" integer="8"/> // <value name="FPGA_CURRENT_VERSION_MAJOR" integer="8"/>
// <value name="FPGA_CURRENT_VERSION_MINOR" integer="1"/> // <value name="FPGA_CURRENT_VERSION_MINOR" integer="2"/>
// <value name="FPGA_CURRENT_VERSION_BUILD" integer="0"/> // <value name="FPGA_CURRENT_VERSION_BUILD" integer="0"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="8"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="8"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="1"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="2"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/>
// <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x23092509"/> // <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x23102410"/>
// </enumeratedtype> // </enumeratedtype>
// </group> // </group>
//</regmap> //</regmap>