fpga: e31x: Cleanup MTU parameters

Original-commit: 55a1ef7e50d271459f44b98d55860bfb2bbe2d19
2022-09-01 14:41:55 -05:00
parent 919acb248f
commit 2f677eddda
2 changed files with 7 additions and 0 deletions
@@ -27,6 +27,7 @@ module e31x_core #(
  parameter FP_GPIO_WIDTH = 8,  // Front panel GPIO width
  parameter DB_GPIO_WIDTH = 16,  // Daughterboard GPIO width
  parameter CHDR_W = 64,
+  parameter BYTE_MTU = $clog2(8192),
  parameter RFNOC_PROTOVER  = {8'd1, 8'd0}
 )(
  // Clocks and resets
@@ -813,6 +814,7 @@ module e31x_core #(

  rfnoc_image_core #(
    .CHDR_W   (CHDR_W),
+    .MTU      (BYTE_MTU - $clog2(CHDR_W/8)),
    .PROTOVER (RFNOC_PROTOVER)
  ) rfnoc_image_core_i (
    .chdr_aclk               (bus_clk    ),