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fpga: x400: use parameter for RFDC info in RF core full

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Original-commit: 97d108b6f9579865f1bbd62e1c9859d290337768
This commit is contained in:
Max Köhler
2024-09-09 10:18:59 -05:00
committed by Wade Fife
parent bea852caeb
commit 264b33a416
1 changed files with 4 additions and 3 deletions
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top/x400/rf/full/rf_core_full.sv
+4 -3
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@@ -135,9 +135,10 @@ module rf_core_full # (
assign dsp_info_sclk[FABRIC_DSP_RX_CNT_MSB:FABRIC_DSP_RX_CNT] = NUM_ADC_CHANNELS; assign dsp_info_sclk[FABRIC_DSP_RX_CNT_MSB:FABRIC_DSP_RX_CNT] = NUM_ADC_CHANNELS;
assign dsp_info_sclk[FABRIC_DSP_TX_CNT_MSB:FABRIC_DSP_TX_CNT] = NUM_DAC_CHANNELS; assign dsp_info_sclk[FABRIC_DSP_TX_CNT_MSB:FABRIC_DSP_TX_CNT] = NUM_DAC_CHANNELS;
// This RF core always consumes 8 SPC from the gearbox per I/Q signal // This RF core is designed to route through the RFDC using the same SPC setting.
assign rfdc_info_sclk[RFDC_INFO_SPC_RX_MSB:RFDC_INFO_SPC_RX] = $clog2(8); // The SPC setting is given as a parameter to this module.
assign rfdc_info_sclk[RFDC_INFO_SPC_TX_MSB:RFDC_INFO_SPC_TX] = $clog2(16); assign rfdc_info_sclk[RFDC_INFO_SPC_RX_MSB:RFDC_INFO_SPC_RX] = $clog2(RADIO_SPC);
assign rfdc_info_sclk[RFDC_INFO_SPC_TX_MSB:RFDC_INFO_SPC_TX] = $clog2(RADIO_SPC*2);
// This RF core module contains no additional resampling // This RF core module contains no additional resampling
assign rfdc_info_sclk[RFDC_INFO_XTRA_RESAMP_MSB:RFDC_INFO_XTRA_RESAMP] = 4'd1; assign rfdc_info_sclk[RFDC_INFO_XTRA_RESAMP_MSB:RFDC_INFO_XTRA_RESAMP] = 4'd1;