fpga: n3xx: Cleanup MTU parameters
Original-commit: 9e4c8cbbbb8677eecbab66ab01a02375664ad4a2
This commit is contained in:
@@ -331,6 +331,9 @@ module n3xx (
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CHDR_W_must_be_64_for_this_USRP();
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CHDR_W_must_be_64_for_this_USRP();
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end
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end
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// Log base 2 of the maximum transmission unit (MTU) in bytes
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localparam BYTE_MTU = $clog2(8192);
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localparam N_AXILITE_SLAVES = 4;
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localparam N_AXILITE_SLAVES = 4;
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localparam REG_AWIDTH = 14; // log2(0x4000)
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localparam REG_AWIDTH = 14; // log2(0x4000)
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localparam QSFP_REG_AWIDTH = 17; // log2(0x20000)
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localparam QSFP_REG_AWIDTH = 17; // log2(0x20000)
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@@ -1179,6 +1182,7 @@ module n3xx (
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.PORTNUM_BASE (4),
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.PORTNUM_BASE (4),
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.REG_DWIDTH (REG_DWIDTH),
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.REG_DWIDTH (REG_DWIDTH),
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.REG_AWIDTH (QSFP_REG_AWIDTH),
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.REG_AWIDTH (QSFP_REG_AWIDTH),
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.BYTE_MTU (BYTE_MTU),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.NODE_INST_BASE (0)
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.NODE_INST_BASE (0)
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) qsfp_wrapper_i (
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) qsfp_wrapper_i (
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@@ -1697,6 +1701,7 @@ module n3xx (
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.REG_DWIDTH(REG_DWIDTH), // Width of the AXI4-Lite data bus (must be 32 or 64)
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.REG_DWIDTH(REG_DWIDTH), // Width of the AXI4-Lite data bus (must be 32 or 64)
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.PORTNUM_BASE(8'd0),
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.PORTNUM_BASE(8'd0),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST_BASE(0)
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.NODE_INST_BASE(0)
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) sfp_wrapper_0 (
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) sfp_wrapper_0 (
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@@ -1870,6 +1875,7 @@ module n3xx (
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.REG_DWIDTH(REG_DWIDTH), // Width of the AXI4-Lite data bus (must be 32 or 64)
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.REG_DWIDTH(REG_DWIDTH), // Width of the AXI4-Lite data bus (must be 32 or 64)
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.PORTNUM_BASE(8'd1),
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.PORTNUM_BASE(8'd1),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST_BASE(1)
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.NODE_INST_BASE(1)
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) sfp_wrapper_1 (
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) sfp_wrapper_1 (
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@@ -2583,6 +2589,7 @@ module n3xx (
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.DWIDTH(REG_DWIDTH),
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.DWIDTH(REG_DWIDTH),
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.AWIDTH(REG_AWIDTH),
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.AWIDTH(REG_AWIDTH),
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.PORTNUM(8'd1),
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.PORTNUM(8'd1),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST(2)
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.NODE_INST(2)
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) eth_internal_i (
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) eth_internal_i (
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@@ -3551,6 +3558,7 @@ module n3xx (
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.NUM_CHANNELS(NUM_CHANNELS),
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.NUM_CHANNELS(NUM_CHANNELS),
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.NUM_DBOARDS(NUM_DBOARDS),
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.NUM_DBOARDS(NUM_DBOARDS),
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.CHDR_W(CHDR_W),
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.CHDR_W(CHDR_W),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER)
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.RFNOC_PROTOVER(RFNOC_PROTOVER)
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) n3xx_core(
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) n3xx_core(
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// Clocks and resets
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// Clocks and resets
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@@ -323,6 +323,9 @@ module n3xx (
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CHDR_W_must_be_64_for_this_USRP();
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CHDR_W_must_be_64_for_this_USRP();
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end
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end
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// Log base 2 of the maximum transmission unit (MTU) in bytes
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localparam BYTE_MTU = $clog2(8192);
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localparam N_AXILITE_SLAVES = 4;
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localparam N_AXILITE_SLAVES = 4;
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localparam REG_AWIDTH = 14; // log2(0x4000)
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localparam REG_AWIDTH = 14; // log2(0x4000)
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localparam QSFP_REG_AWIDTH = 17; // log2(0x20000)
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localparam QSFP_REG_AWIDTH = 17; // log2(0x20000)
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@@ -1169,6 +1172,7 @@ module n3xx (
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.PORTNUM_BASE (4),
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.PORTNUM_BASE (4),
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.REG_DWIDTH (REG_DWIDTH),
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.REG_DWIDTH (REG_DWIDTH),
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.REG_AWIDTH (QSFP_REG_AWIDTH),
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.REG_AWIDTH (QSFP_REG_AWIDTH),
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.BYTE_MTU (BYTE_MTU),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.NODE_INST_BASE (0)
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.NODE_INST_BASE (0)
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) qsfp_wrapper_i (
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) qsfp_wrapper_i (
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@@ -1688,6 +1692,7 @@ module n3xx (
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.GT_COMMON(1),
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.GT_COMMON(1),
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.PORTNUM_BASE(8'd0),
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.PORTNUM_BASE(8'd0),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST_BASE(0)
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.NODE_INST_BASE(0)
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) sfp_wrapper_0 (
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) sfp_wrapper_0 (
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@@ -1861,6 +1866,7 @@ module n3xx (
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.REG_AWIDTH(REG_AWIDTH), // Width of the address bus
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.GT_COMMON(1),
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.GT_COMMON(1),
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.PORTNUM_BASE(8'd1),
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.PORTNUM_BASE(8'd1),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST_BASE(1)
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.NODE_INST_BASE(1)
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) sfp_wrapper_1 (
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) sfp_wrapper_1 (
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@@ -2574,6 +2580,7 @@ module n3xx (
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.DWIDTH(REG_DWIDTH),
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.DWIDTH(REG_DWIDTH),
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.AWIDTH(REG_AWIDTH),
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.AWIDTH(REG_AWIDTH),
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.PORTNUM(8'd1),
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.PORTNUM(8'd1),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.RFNOC_PROTOVER(RFNOC_PROTOVER),
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.NODE_INST(2)
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.NODE_INST(2)
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) eth_internal_i (
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) eth_internal_i (
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@@ -3471,6 +3478,7 @@ module n3xx (
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.NUM_SPI_PER_DBOARD(4),
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.NUM_SPI_PER_DBOARD(4),
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.USE_CORRECTION(1),
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.USE_CORRECTION(1),
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.CHDR_W(CHDR_W),
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.CHDR_W(CHDR_W),
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.BYTE_MTU(BYTE_MTU),
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.RFNOC_PROTOVER(RFNOC_PROTOVER)
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.RFNOC_PROTOVER(RFNOC_PROTOVER)
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) n3xx_core(
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) n3xx_core(
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// Clocks and resets
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// Clocks and resets
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@@ -26,6 +26,7 @@ module n3xx_core #(
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parameter USE_CORRECTION = 0,
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parameter USE_CORRECTION = 0,
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parameter FP_GPIO_WIDTH = 12, // Front panel GPIO width
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parameter FP_GPIO_WIDTH = 12, // Front panel GPIO width
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parameter CHDR_W = 64,
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parameter CHDR_W = 64,
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parameter BYTE_MTU = $clog2(8192),
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parameter RFNOC_PROTOVER = {8'd1, 8'd0}
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parameter RFNOC_PROTOVER = {8'd1, 8'd0}
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)(
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)(
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// Clocks and resets
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// Clocks and resets
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@@ -1118,6 +1119,7 @@ module n3xx_core #(
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rfnoc_image_core #(
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rfnoc_image_core #(
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.CHDR_W (CHDR_W),
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.CHDR_W (CHDR_W),
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.MTU (BYTE_MTU - $clog2(CHDR_W/8)),
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.PROTOVER (RFNOC_PROTOVER)
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.PROTOVER (RFNOC_PROTOVER)
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) rfnoc_sandbox_i (
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) rfnoc_sandbox_i (
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.chdr_aclk (bus_clk ),
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.chdr_aclk (bus_clk ),
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@@ -21,6 +21,7 @@
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// REG_DWIDTH : Width of regport address bus
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// REG_DWIDTH : Width of regport address bus
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// REG_AWIDTH : Width of regport data bus
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// REG_AWIDTH : Width of regport data bus
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// GT_COMMON : Use GT Common ports on MGT
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// GT_COMMON : Use GT Common ports on MGT
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// BYTE_MTU : Log base 2 of the MTU size in bytes
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// RFNOC_PROTOVER : RFNoC protocol version to be reported by transport
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// RFNOC_PROTOVER : RFNoC protocol version to be reported by transport
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// adapters.
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// adapters.
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// NODE_INST : RFNoC transport adapter node instance for this port
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// NODE_INST : RFNoC transport adapter node instance for this port
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@@ -37,6 +38,7 @@ module n3xx_mgt_channel_wrapper #(
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parameter REG_DWIDTH = 32,
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parameter REG_DWIDTH = 32,
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parameter REG_AWIDTH = 14,
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parameter REG_AWIDTH = 14,
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parameter GT_COMMON = 1,
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parameter GT_COMMON = 1,
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parameter BYTE_MTU = $clog2(8192),
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parameter [15:0] RFNOC_PROTOVER = {8'd1, 8'd0},
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parameter [15:0] RFNOC_PROTOVER = {8'd1, 8'd0},
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parameter NODE_INST_BASE = 0
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parameter NODE_INST_BASE = 0
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)(
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)(
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@@ -292,6 +294,7 @@ module n3xx_mgt_channel_wrapper #(
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.GT_COMMON (GT_COMMON),
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.GT_COMMON (GT_COMMON),
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.MDIO_EN (MDIO_EN),
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.MDIO_EN (MDIO_EN),
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.MDIO_PHYADDR (MDIO_PHYADDR),
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.MDIO_PHYADDR (MDIO_PHYADDR),
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.BYTE_MTU (BYTE_MTU),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.RFNOC_PROTOVER (RFNOC_PROTOVER),
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.PORTNUM (PORTNUM_BASE + l),
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.PORTNUM (PORTNUM_BASE + l),
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.NODE_INST (NODE_INST_BASE + l)
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.NODE_INST (NODE_INST_BASE + l)
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@@ -19,6 +19,7 @@
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// PORTNUM : Port number
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// PORTNUM : Port number
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// MDIO_EN : Enables internal MDIO master
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// MDIO_EN : Enables internal MDIO master
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// MDIO_PHYADDR : Address to use for the MDIO
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// MDIO_PHYADDR : Address to use for the MDIO
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// BYTE_MTU : Log base 2 of the MTU size in bytes
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// RFNOC_PROTOVER : RFNoC protocol version to be reported by transport
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// RFNOC_PROTOVER : RFNoC protocol version to be reported by transport
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// adapters.
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// adapters.
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// NODE_INST : RFNoC transport adapter node instance for this port
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// NODE_INST : RFNoC transport adapter node instance for this port
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@@ -38,6 +39,7 @@ module n3xx_mgt_wrapper #(
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parameter [ 7:0] PORTNUM = 8'd0,
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parameter [ 7:0] PORTNUM = 8'd0,
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parameter MDIO_EN = 0,
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parameter MDIO_EN = 0,
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parameter [ 4:0] MDIO_PHYADDR = 5'd0,
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parameter [ 4:0] MDIO_PHYADDR = 5'd0,
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parameter BYTE_MTU = $clog2(8192),
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parameter [15:0] RFNOC_PROTOVER = {8'd1, 8'd0},
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parameter [15:0] RFNOC_PROTOVER = {8'd1, 8'd0},
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parameter NODE_INST = 0,
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parameter NODE_INST = 0,
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parameter EN_RX_KV_MAP_CFG = 1,
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parameter EN_RX_KV_MAP_CFG = 1,
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@@ -423,6 +425,8 @@ module n3xx_mgt_wrapper #(
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if (EN_RX_KV_MAP_CFG || EN_RX_RAW_PYLD) begin : gen_eth_ipv4_interface_wrapper
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if (EN_RX_KV_MAP_CFG || EN_RX_RAW_PYLD) begin : gen_eth_ipv4_interface_wrapper
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eth_ipv4_interface_wrapper #(
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eth_ipv4_interface_wrapper #(
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.PROTOVER (RFNOC_PROTOVER),
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.PROTOVER (RFNOC_PROTOVER),
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.CPU_FIFO_SIZE (BYTE_MTU),
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.CHDR_FIFO_SIZE (BYTE_MTU),
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.NODE_INST (NODE_INST),
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.NODE_INST (NODE_INST),
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.REG_AWIDTH (REG_AWIDTH),
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.REG_AWIDTH (REG_AWIDTH),
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.BASE (REG_BASE_ETH_SWITCH),
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.BASE (REG_BASE_ETH_SWITCH),
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@@ -482,7 +486,7 @@ module n3xx_mgt_wrapper #(
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else begin : gen_eth_interface
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else begin : gen_eth_interface
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eth_interface #(
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eth_interface #(
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.PROTOVER (RFNOC_PROTOVER),
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.PROTOVER (RFNOC_PROTOVER),
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.MTU (10),
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.MTU (BYTE_MTU-3), // Log base 2 of the MTU in 64-bit words
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.NODE_INST (NODE_INST),
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.NODE_INST (NODE_INST),
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.REG_AWIDTH (REG_AWIDTH),
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.REG_AWIDTH (REG_AWIDTH),
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.BASE (REG_BASE_ETH_SWITCH)
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.BASE (REG_BASE_ETH_SWITCH)
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