From 1b9a79381a37c94d30918b06abeb3d4aa1b06a5a Mon Sep 17 00:00:00 2001 From: Mark Eid Date: Thu, 29 Jun 2023 15:56:35 -0500 Subject: [PATCH] fpga: x400: Fix PRC divider register map Original-commit: 367adaa35e1f707be52011d491025193e4436eb1 --- top/x400/doc/X410/X410_FPGA_right.htm | 14 +++++++------- top/x400/doc/X440/X440_FPGA_right.htm | 14 +++++++------- top/x400/x4xx_global_regs.v | 14 +++++++------- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/top/x400/doc/X410/X410_FPGA_right.htm b/top/x400/doc/X410/X410_FPGA_right.htm index 0b6de9a..bbb4f5f 100644 --- a/top/x400/doc/X410/X410_FPGA_right.htm +++ b/top/x400/doc/X410/X410_FPGA_right.htm @@ -6621,11 +6621,11 @@ Control registers for PPS generation.

PPS_RC_ENABLED

Enables the PPS signal in radio clock domain. Please make sure that - the values of PPS_BRC_DELAY, PPS_PRC_DELAY and @.PRC_RC_DIVIDER are - set before enabling this bit. It is recommended to disable the PPS - for changes on the other values. Use a wait time of at least 1 second - before changing this value to ensure the values are stable for the - next PPS edge.

+ the values of PPS_BRC_DELAY, PPS_PRC_DELAY, PRC_RC0_DIVIDER and + PRC_RC1_DIVIDER are set before enabling this bit. It is recommended + to disable the PPS for changes on the other values. Use a wait time of + at least 1 second before changing this value to ensure the values are + stable for the next PPS edge.

@@ -7014,7 +7014,7 @@ Total Offset =
-RESERVED. This register is not implemented on X4xx. GPS is connected +RESERVED. This register is not implemented on X4xx. GPS is connected to the PS via a UART.
@@ -7096,7 +7096,7 @@ Total Offset =
-RESERVED. This register is not implemented on X4xx. GPS is connected +RESERVED. This register is not implemented on X4xx. GPS is connected to the PS via a UART.
diff --git a/top/x400/doc/X440/X440_FPGA_right.htm b/top/x400/doc/X440/X440_FPGA_right.htm index 0089b13..e9aa8c2 100644 --- a/top/x400/doc/X440/X440_FPGA_right.htm +++ b/top/x400/doc/X440/X440_FPGA_right.htm @@ -6907,11 +6907,11 @@ Control registers for PPS generation.

PPS_RC_ENABLED

Enables the PPS signal in radio clock domain. Please make sure that - the values of PPS_BRC_DELAY, PPS_PRC_DELAY and @.PRC_RC_DIVIDER are - set before enabling this bit. It is recommended to disable the PPS - for changes on the other values. Use a wait time of at least 1 second - before changing this value to ensure the values are stable for the - next PPS edge.

+ the values of PPS_BRC_DELAY, PPS_PRC_DELAY, PRC_RC0_DIVIDER and + PRC_RC1_DIVIDER are set before enabling this bit. It is recommended + to disable the PPS for changes on the other values. Use a wait time of + at least 1 second before changing this value to ensure the values are + stable for the next PPS edge.

@@ -7300,7 +7300,7 @@ Total Offset =
-RESERVED. This register is not implemented on X4xx. GPS is connected +RESERVED. This register is not implemented on X4xx. GPS is connected to the PS via a UART.
@@ -7382,7 +7382,7 @@ Total Offset =
-RESERVED. This register is not implemented on X4xx. GPS is connected +RESERVED. This register is not implemented on X4xx. GPS is connected to the PS via a UART.
diff --git a/top/x400/x4xx_global_regs.v b/top/x400/x4xx_global_regs.v index 8c9e2f9..c4ca53d 100644 --- a/top/x400/x4xx_global_regs.v +++ b/top/x400/x4xx_global_regs.v @@ -603,11 +603,11 @@ endmodule // // // Enables the PPS signal in radio clock domain. Please make sure that -// the values of @.PPS_BRC_DELAY, @.PPS_PRC_DELAY and @.PRC_RC_DIVIDER are -// set before enabling this bit. It is recommended to disable the PPS -// for changes on the other values. Use a wait time of at least 1 second -// before changing this value to ensure the values are stable for the -// next PPS edge. +// the values of @.PPS_BRC_DELAY, @.PPS_PRC_DELAY, @.PRC_RC0_DIVIDER and +// @.PRC_RC1_DIVIDER are set before enabling this bit. It is recommended +// to disable the PPS for changes on the other values. Use a wait time of +// at least 1 second before changing this value to ensure the values are +// stable for the next PPS edge. // // // @@ -671,13 +671,13 @@ endmodule // // // -// RESERVED. This register is not implemented on X4xx. GPS is connected +// RESERVED. This register is not implemented on X4xx. GPS is connected // to the PS via a UART. // // // // -// RESERVED. This register is not implemented on X4xx. GPS is connected +// RESERVED. This register is not implemented on X4xx. GPS is connected // to the PS via a UART. // //