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fpga: x400: Expand PS GPIO port for DIO control

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Original-commit: 4bfbb9eeec92fdd3e9d7096006f63477d4848f76
This commit is contained in:
Javier Valenzuela
2022-01-25 10:18:47 -07:00
committed by Wade Fife
parent 5237e5778c
commit 1ac4909e6f
7 changed files with 58 additions and 19 deletions
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top/x400/dboards/zbx/cpld/quartus/zbx_top_cpld.qsf
+1 -1
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@@ -854,7 +854,7 @@ set_global_assignment -name VERILOG_INCLUDE_FILE ../../../../../../lib/control/r
set_global_assignment -name VERILOG_FILE ../../../../../../lib/control/ram_2port.v
set_global_assignment -name VERILOG_FILE ../../../../../../lib/control/handshake.v
set_global_assignment -name VERILOG_FILE ../../../../../../lib/control/pulse_synchronizer.v
set_global_assignment -name VERILOG_FILE ../ctrlport_window.v
set_global_assignment -name VERILOG_FILE ../../../../../../lib/rfnoc/utils/ctrlport_window.v
set_global_assignment -name QSYS_FILE ../ip/on_chip_flash/on_chip_flash.qsys
set_global_assignment -name QSYS_FILE ../ip/osc/osc.qsys